Reset
M25PE80
8
Reset
Driving reset (Reset) Low while an internal operation is in progress will affect this operation
(write, program or erase cycle) and data may be lost.
All the lock bits are reset to 0 after a Reset Low pulse.
Table 15 shows the status of the device after a Reset Low pulse.
Table 15. Device status after a Reset Low pulse
Conditions:
reset pulse occurred
Internal logic
status
Lock bits status
Addressed data
While decoding an instruction(1): WREN,
WRDI, RDID, RDSR, READ, RDLR,
Fast_Read, WRLR, PW, PP, PE, SE, BE,
SSE, DP, RDP
Reset to 0
Same as POR
Not significant
Under completion of an erase or program
cycle of a PW, PP, PE, SSE, SE, BE
operation
Equivalent to
POR
Addressed data
could be modified
Reset to 0
Equivalent to
POR (after tW)
Write is correctly
completed
Under completion of a WRSR operation
Reset to 0
Reset to 0
Device deselected (S High) and in standby
mode
Same as POR
Not significant
1. S remains Low while Reset is Low.
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NUMONYX [ NUMONYX B.V ]
