DC and AC parameters
M25PE80
Table 22. AC characteristics
Test conditions specified in Table 17 and Table 18
Symbol
Alt.
Parameter
Min
Typ
Max
Unit
Clock frequency for the following
instructions: FAST_READ, RDLR, PW,
PP, WRLR, PE, SE, DP, RDP, WREN,
WRDI, RDSR
fC
fC
D.C.
50
20
MHz
fR
Clock frequency for read instructions
Clock high time
D.C.
9
MHz
ns
(1)
tCH
tCLH
tCLL
(1)
tCL
Clock low time
9
ns
Clock slew rate(2) (peak to peak)
S active setup time (relative to C)
S not active hold time (relative to C)
Data in setup time
0.1
5
V/ns
ns
tSLCH
tCHSL
tDVCH
tCHDX
tCHSH
tSHCH
tSHSL
tCSS
5
ns
tDSU
tDH
2
ns
Data in hold time
5
ns
S active hold time (relative to C)
S not active setup time (relative to C)
S deselect time
5
ns
5
ns
tCSH
tDIS
tV
100
ns
(2)
tSHQZ
Output disable time
8
8
ns
tCLQV
tCLQX
tTHSL
tSHTL
Clock low to output valid
Output hold time
ns
tHO
0
ns
Top sector lock setup time
Top sector lock hold time
S to deep power-down
50
ns
100
ns
(2)
tDP
3
µs
µs
(2)
tRDP
S high to standby mode
Page write cycle time (256 bytes)
30
11
(3)
tPW
25
5
ms
ms
10.1 +
n * 0.9/256
Page write cycle time (n bytes)
Page program cycle time (256 bytes)
Page program cycle time (n bytes)
1.35
(3)
tPP
0.45 +
n * 0.9/256
tPE
tSE
tBE
Page erase cycle time
Sector erase cycle time
Bulk erase cycle time
10
1
20
5
ms
s
10
60
s
1. tCH + tCL must be greater than or equal to 1/ fC.
2. Value guaranteed by characterization, not 100% tested in production.
3. When using PP and PW instructions to update consecutive bytes, optimized timings are obtained with one
sequence including all the bytes versus several sequences of only a few bytes (1 ≤ n ≤ 256).
52/66
NUMONYX [ NUMONYX B.V ]
