Instruction Set (Continued)
Table 9-29. FPU Instruction Set Summary
Clock
Count
Notes
FPU Instruction
Opcode
Operation
F2XM1 Function Evaluation 2x-1
FABS Floating Absolute Value
FADD Floating Point Add
Top of Stack
D9 F0
D9 E1
TOS <--- 2TOS-1
TOS <--- | TOS |
92 - 108
2
2
2
DC [1100 0 n]
ST(n) <--- ST(n) + TOS
4 - 9
4 - 9
4 - 9
4 - 9
80-bit Register
D8 [1100 0 n]
TOS <--- TOS + ST(n)
64-bit Real
DC [mod 000 r/m]
D8 [mod 000 r/m]
DE [1100 0 n]
TOS <--- TOS + M.DR
32-bit Real
TOS <--- TOS + M.SR
FADDP Floating Point Add, Pop
FIADD Floating Point Integer Add
32-bit integer
ST(n) <--- ST(n) + TOS; then pop TOS
DA [mod 000 r/m]
DE [mod 000 r/m]
D9 E0
TOS <--- TOS + M.SI
TOS <--- TOS + M.WI
TOS <--- - TOS
8 - 14
16-bit integer
8 - 14
FCHS Floating Change Sign
FCLEX Clear Exceptions
FNCLEX Clear Exceptions
2
5
3
4
(9B) DB E2
DB E2
Wait then Clear Exceptions
Clear Exceptions
FCMOVB Floating Point Conditional Move if
DA [1100 0 n]
If (CF=1) ST(0) <--- ST(n)
Below
FCMOVE Floating Point Conditional Move if
Equal
DA [1100 1 n]
DA [1101 0 n]
DA [1101 1 n]
DB [1100 0 n]
DB [1100 1 n]
DB [1101 0 n]
DB [1101 1 n]
If (ZF=1) ST(0) <--- ST(n)
4
4
4
4
4
4
4
FCMOVBE Floating Point Conditional Move if
If (CF=1 or ZF=1) ST(0) <--- ST(n)
If (PF=1) ST(0) <--- ST(n)
Below or Equal
FCMOVU Floating Point Conditional Move if
Unordered
FCMOVNB Floating Point Conditional Move if
If (CF=0) ST(0) <--- ST(n)
Not Below
FCMOVNE Floating Point Conditional Move if
If (ZF=0) ST(0) <--- ST(n)
Not Equal
FCMOVNBE Floating Point Conditional Move if
If (CF=0 and ZF=0) ST(0) <--- ST(n)
If (DF=0) ST(0) <--- ST(n)
Not Below or Equal
FCMOVNU Floating Point Conditional Move if
Not Unordered
FCOM Floating Point Compare
80-bit Register
D8 [1101 0 n]
CC set by TOS - ST(n)
CC set by TOS - M.DR
CC set by TOS - M.SR
4
4
4
64-bit Real
DC [mod 010 r/m]
D8 [mod 010 r/m]
32-bit Real
FCOMP Floating Point Compare, Pop
80-bit Register
D8 [1101 1 n]
DC [mod 011 r/m]
D8 [mod 011 r/m]
DE D9
CC set by TOS - ST(n); then pop TOS
CC set by TOS - M.DR; then pop TOS
CC set by TOS - M.SR; then pop TOS
4
4
4
4
64-bit Real
32-bit Real
FCOMPP Floating Point Compare, Pop
CC set by TOS - ST(1); then pop TOS and
ST(1)
Two Stack Elements
FCOMI Floating Point Compare Real and Set EFLAGS
80-bit Register
DB [1111 0 n]
EFLAG set by TOS - ST(n)
4
FCOMIP Floating Point Compare Real and Set EFLAGS, Pop
80-bit Register
DF [1111 0 n]
EFLAG set by TOS - ST(n); then pop TOS
EFLAG set by TOS - ST(n)
4
FUCOMI Floating Point Unordered Compare Real and Set EFLAGS
80-bit Integer
DB [1110 1 n]
9 - 10
9 - 10
FUCOMIP Floating Point Unordered Compare Real and Set EFLAGS, Pop
80-bit Integer
DF [1110 1 n]
EFLAG set by TOS - ST(n); then pop TOS
FICOM Floating Point Integer Compare
32-bit integer
DA [mod 010 r/m]
DE [mod 010 r/m]
CC set by TOS - M.WI
CC set by TOS - M.SI
9 - 10
9 - 10
16-bit integer
FICOMP Floating Point Integer Compare, Pop
32-bit integer
DA [mod 011 r/m]
DE [mod 011 r/m
CC set by TOS - M.WI; then pop TOS
CC set by TOS - M.SI; then pop TOS
9 - 10
9 - 10
16-bit integer
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