Instruction Set (Continued)
Table 9-27. Processor Core Instruction Set Summary (Continued)
Real
Mode
Prot’d Real Prot’d
Mode Mode Mode
Flags
O
F
D
F
I
F
T
F
S
F
Z
F
A
F
P
F
C
F
Clock Count
(Reg/Cache Hit)
Instruction
Opcode
Notes
SETL/SETNGE Set Byte on Less/Not Greater or Equal
To Register/Memory
0F 9C [mod 000 r/m]
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
1
1
1
1
1
1
1
1
1
1
1
1
1
6
6
1
1
1
1
1
1
1
1
1
1
1
1
1
6
6
1
h
h
h
h
h
h
h
h
h
h
h
h
h
h
h
h
SETLE/SETNG Set Byte on Less or Equal/Not Greater
To Register/Memory
0F 9E [mod 000 r/m]
SETNB/SETAE/SETNC Set Byte on Not Below/Above or Equal/Not Carry
To Register/Memory
0F 93 [mod 000 r/m]
SETNBE/SETA Set Byte on Not Below or Equal/Above
To Register/Memory
0F 97 [mod 000 r/m]
SETNE/SETNZ Set Byte on Not Equal/Not Zero
To Register/Memory
0F 95 [mod 000 r/m]
SETNL/SETGE Set Byte on Not Less/Greater or Equal
To Register/Memory
0F 9D [mod 000 r/m]
SETNLE/SETG Set Byte on Not Less or Equal/Greater
To Register/Memory
SETNO Set Byte on Not Overflow
To Register/Memory
0F 9F [mod 000 r/m]
0F 91 [mod 000 r/m]
0F 9B [mod 000 r/m]
0F 99 [mod 000 r/m]
0F 90 [mod 000 r/m]
0F 9A [mod 000 r/m]
0F 98 [mod 000 r/m]
0F 01 [mod 000 r/m]
0F 01 [mod 001 r/m]
0F 00 [mod 000 r/m]
SETNP/SETPO Set Byte on Not Parity/Parity Odd
To Register/Memory
SETNS Set Byte on Not Sign
To Register/Memory
SETO Set Byte on Overflow
To Register/Memory
SETP/SETPE Set Byte on Parity/Parity Even
To Register/Memory
SETS Set Byte on Sign
To Register/Memory
SGDT Store GDT Register
To Register/Memory
b,c
b,c
a
SIDT Store IDT Register
To Register/Memory
SLDT Store LDT Register
To Register/Memory
STR Store Task Register
To Register/Memory
0F 00 [mod 001 r/m]
0F 01 [mod 100 r/m]
A [101w]
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
3
4
2
a
b,c
b
h
h
h
SMSW Store Machine Status Word
STOS Store String
4
2
SHL Shift Left Logical
Register/Memory by 1
D [000w] [mod 100 r/m]
D [001w] [mod 100 r/m]
C [000w] [mod 100 r/m] #
x
u
u
-
-
-
-
-
-
-
-
-
x
x
x
x
x
x
u
u
u
x
x
x
x
x
x
1
2
1
1
2
1
b
h
Register/Memory by CL
Register/Memory by Immediate
SHLD Shift Left Double
Register/Memory by Immediate
Register/Memory by CL
SHR Shift Right Logical
Register/Memory by 1
0F A4 [mod reg r/m] #
0F A5 [mod reg r/m]
u
-
-
-
x
x
u
x
x
3
6
3
6
b
b
h
h
D [000w] [mod 101 r/m]
D [001w] [mod 101 r/m]
C [000w] [mod 101 r/m] #
x
u
u
-
-
-
-
-
-
-
-
-
x
x
x
x
x
x
u
u
u
x
x
x
x
x
x
2
2
2
2
2
2
Register/Memory by CL
Register/Memory by Immediate
SHRD Shift Right Double
Register/Memory by Immediate
Register/Memory by CL
SMINT Software SMM Entry
0F AC [mod reg r/m] #
0F AD [mod reg r/m]
0F 38
u
-
-
-
-
-
-
-
x
-
x
-
u
-
x
-
x
-
3
6
3
6
b
s
h
s
84
84
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221
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