Integrated Functions (Continued)
4.6.8.3
PCI Arbitration
The GXm processor’s PCI arbiter can then grant access
to agent A, and does so on clock 7. Note that all buffers
must flush before a grant is given to a new agent.
An agent requests the bus by asserting its REQ#. Based
on the arbitration scheme set in the PCI Arbitration Con-
trol 2 Register (Index 44h), the GX PCI arbiter will grant
the request by asserting GNT#. Figure 4-20 illustrates
basic arbitration.
For additional information refer to Chapter 3.4.1, Arbitra-
tion Signaling Protocol, of the PCI Local Bus Specifica-
tion, Revision 2.1.
REQ#-a is asserted at clock 1. The PCI GXm processor
arbiter grants access to Agent A by asserting GNT#-a on
clock 2. Agent A must begin a transaction by asserting
FRAME# within 16 clocks, or the GX PCI arbiter will
remove GNT#. Also, it is possible for Agent A to lose bus
ownership sooner if another agent with higher priority
requests the bus. However, in this example, Agent A
starts the transaction on clock 3 by asserting FRAME#
and completes its transaction. Since Agent A requests
another transaction, REQ#-a remains asserted. When
FRAME# is asserted on clock 3, the GXm processor’s PCI
arbiter determines Agent B should go next, asserts
GNT#-b and deasserts GNT#-a on clock 4. Agent B
requires only a single transaction. It completes the trans-
action, then deasserts FRAME# and REQ#-b on clock 6.
4.6.8.4
PCI Halt Command
Halt is a broadcast message from the processor indicating
it has executed a halt instruction. The PCI Special Cycle
command is used to broadcast the message to all agents
on the bus segment. During the address phase of the Halt
Special cycle, C/BE[3:0]# = 0001 and AD[31:0] are driven
to random values. During the data phase, C/BE[3:0]# =
1100 indicating bytes 1 and 0 are valid and AD[15:0] =
0001h.
For additional information, refer to Chapter 3.7.2, Special
Cycle, and Appendix A, Special Cycle Messages, of the
PCI Local Bus Specification, Revision 2.1.
CLK
REQ#-a
REQ#-b
GNT#-a
GNT#-b
FRAME#
ADDR
ADDR
DATA
DATA
AD
access-a
access-b
Figure 4-20. Basic Arbitration
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