CHAPTER 3 SPECIFICATIONS OF PCI HOST BRIDGE MACRO
(iii) Write data parity error 1
Timing type: Single write cycle data parity error
Figure 3-23. Write Data Parity Error 1
PCICLK
AD
FRAME#
IRDY#
DEVSEL#
TRDY#
STOP#
PAR
H
PERR#
SERR#
(iv) Write data parity error 2
Timing type: Burst write cycle data parity error
Figure 3-24. Write Data Parity Error 2
PCICLK
AD
FRAME#
IRDY#
DEVSEL#
TRDY#
STOP#
PAR
PERR#
SERR#
56
Application Note U17121EJ1V1AN