µPD703100A-33, 703100A-40, 703101A-33, 703102A-33
(e) Read timing (EDO DRAM) (2/3)
Parameter
Symbol
<99> tOEA1
Condition
MIN.
MAX.
Unit
ns
Output enable access
time
Off-page
On-page
(2 + wPR + wRH + wDA)
T – 20
<100>
tOEA2
(1 + wCP + wDA
)
T – 20
ns
Remarks 1. T = tCYK
2. wRP: the number of waits due to the RPCxx bit of the DRCn register (n = 0 to 3, xx = 00 to 03, 10 to
13).
3. wRH: the number of waits due to the RHCxx bit of the DRCn register (n = 0 to 3, xx = 00 to 03, 10 to
13).
4. wDA: the number of waits due to the DACxx bit of the DRCn register (n = 0 to 3, xx = 00 to 03, 10 to
13).
5. wCP: the number of waits due to the CPCxx bit of the DRCn register (n = 0 to 3, xx = 00 to 03, 10 to
13).
103
Preliminary Data Sheet U14168EJ2V0DS00