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UPD703100AGJ-40-8EU 参数 Datasheet PDF下载

UPD703100AGJ-40-8EU图片预览
型号: UPD703100AGJ-40-8EU
PDF下载: 下载PDF文件 查看货源
内容描述: V850E / MS1TM 16分之32位单芯片微控制器 [V850E/MS1TM 32/16-BIT SINGLE-CHIP MICROCONTROLLERS]
分类和应用: 微控制器和处理器外围集成电路时钟
文件页数/大小: 132 页 / 1155 K
品牌: NEC [ NEC ]
 浏览型号UPD703100AGJ-40-8EU的Datasheet PDF文件第99页浏览型号UPD703100AGJ-40-8EU的Datasheet PDF文件第100页浏览型号UPD703100AGJ-40-8EU的Datasheet PDF文件第101页浏览型号UPD703100AGJ-40-8EU的Datasheet PDF文件第102页浏览型号UPD703100AGJ-40-8EU的Datasheet PDF文件第104页浏览型号UPD703100AGJ-40-8EU的Datasheet PDF文件第105页浏览型号UPD703100AGJ-40-8EU的Datasheet PDF文件第106页浏览型号UPD703100AGJ-40-8EU的Datasheet PDF文件第107页  
µPD703100A-33, 703100A-40, 703101A-33, 703102A-33  
(e) Read timing (EDO DRAM) (2/3)  
Parameter  
Symbol  
<99> tOEA1  
Condition  
MIN.  
MAX.  
Unit  
ns  
Output enable access  
time  
Off-page  
On-page  
(2 + wPR + wRH + wDA)  
T – 20  
<100>  
tOEA2  
(1 + wCP + wDA  
)
T – 20  
ns  
Remarks 1. T = tCYK  
2. wRP: the number of waits due to the RPCxx bit of the DRCn register (n = 0 to 3, xx = 00 to 03, 10 to  
13).  
3. wRH: the number of waits due to the RHCxx bit of the DRCn register (n = 0 to 3, xx = 00 to 03, 10 to  
13).  
4. wDA: the number of waits due to the DACxx bit of the DRCn register (n = 0 to 3, xx = 00 to 03, 10 to  
13).  
5. wCP: the number of waits due to the CPCxx bit of the DRCn register (n = 0 to 3, xx = 00 to 03, 10 to  
13).  
103  
Preliminary Data Sheet U14168EJ2V0DS00  
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