NTC Proprietary
Level: Property
DDR3(L)-2Gb SDRAM
NT5CB(C)256M8JQ/NT5CB(C)128M16JR
DDR3(L)-1600
DDR3(L)-1866
DDR3-2133
Unit
Parameter
Symbol
Min.
Max.
Min.
Max.
Min.
Max.
Command and Address Timing
Control and Address Input pulse width for
each input
tIPW
0.75
-
0.75
-
0.75
-
tCK(avg)
Calibration Timing
tZQINITmin: max(512tCK, 640ns)
tZQINITmax: -
tZQOPERmin: max(256tCK, 320ns)
tZQOPERmax: -
tZQCSmin: max(64 tCK, 80ns)
tZQCSmax: -
Power-up and RESET calibration time
tZQINIT
tZQOPER
tZQCS
Normal operation Full calibration time
Normal operation Short calibration time
Reset Timing
Exit Reset from CKE HIGH to a valid
command
tXPRmin.: max(5 tCK, tRFC(min) + 10ns)
tXPRmax.: -
tXPR
Self Refresh Timings
Exit Self Refresh to commands not requiring
a locked DLL
tXSmin.: max(5 tCK, tRFC (min) + 10ns)
tXSmax.: -
tXS
Exit Self Refresh to commands requiring a
locked DLL
Minimum CKE low width for Self Refresh
entry to exit timing
Valid Clock Requirement after Self Refresh
Entry (SRE) or Power-Down Entry (PDE)
tXSDLLmin.: tDLLK(min)
tXSDLLmax.: -
tCKESRmin.: tCKE(min) + 1 tCK
tCKESRmax.: -
tCKSREmin.: max(5 tCK, 10 ns)
tCKSREmax.: -
tXSDLL
tCKESR
tCKSRE
nCK
Valid Clock Requirement before Self
Refresh Exit (SRX) or Power-Down Exit
(PDX) or Reset Exit
tCKSRXmin.: max(5 tCK, 10 ns)
tCKSRXmax.: -
tCKSRX
Power Down Timings
Exit Power Down with DLL on to any valid
command; Exit Precharge Power Down with
DLL frozen to commands not requiring a
locked DLL
max(3tCK
,6ns)
max(3tCK
,6ns)
max(3tCK
,6ns)
tXP
-
-
-
-
-
-
max(3tCK
5ns)
max(3tCK
,5ns)
max(3tCK
,5ns)
CKE minimum pulse width
tCKE
Exit Precharge Power Down with DLL
frozen to commands requiring a locked DLL
tXPDLLmin.: max(10tCK, 24ns)
tXPDLLmax.: -
tXPDLL
tCPDEDmin.: 1
tCPDEDmax.:
tCPDEDmin.: 2
tCPDEDmax.:
Command pass disable delay
tCPDED
nCK
-
-
tPDmin.: tCKE(min)
tPDmax.: 9*tREFI
Power Down Entry to Exit Timing
tPD
Timing of ACT command to Power Down
entry
tACTPDENmin.: 1
tACTPDENmax.: -
nCK
nCK
nCK
nCK
nCK
nCK
nCK
tACTPDEN
tPRPDEN
tRDPDEN
tWRPDEN
tWRAPDEN
tWRPDEN
tWRAPDEN
tREFPDEN
tMRSPDEN
Timing of PRE or PREA command to Power
Down entry
tPRPDENmin.: 1
tPRPDENmax.: -
Timing of RD/RDA command to Power
Down entry
tRDPDENmin.: RL+4+1
tRDPDENmax.: -
Timing of WR command to Power Down
entry (BL8OTF, BL8MRS, BC4OTF)
tWRPDENmin.: WL + 4 + (tWR /tCK(avg))
tWRPDENmax.: -
Timing of WRA command to Power Down
entry (BL8OTF, BL8MRS, BC4OTF)
tWRAPDENmin.: WL+4+WR+1
tWRAPDENmax.: -
Timing of WR command to Power Down
entry (BC4MRS)
tWRPDENmin.: WL + 2 + (tWR /tCK(avg))
tWRPDENmax.: -
Timing of WRA command to Power Down
entry (BC4MRS)
tWRAPDENmin.: WL + 2 +WR + 1
tWRAPDENmax.: -
Timing of REF command to Power Down
entry
tREFPDENmin.: 1
tREFPDENmax.: -
nCK
Timing of MRS command to Power Down
entry
tMRSPDENmin.: tMOD(min)
tMRSPDENmax.: -
Version 1.4
05/2019
138
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