Freescale Semiconductor, Inc.
Appendix: CGM Practical Aspects
Table 21-2. Suggested 8MHz Synthesis PLL Filter Elements (Acquisition Mode)
Loop
Bandwidth
[kHz]
Reference
[MHz]
Bandwidth
Limit [kHz]
C [nF]
R [kΩ]
C [nF]
SYNR
Fbus [MHz]
0
0
p
0.614
0.614
0.614
0.614
0.8
0.8
0.8
0.8
1
$0C
$0C
$0C
$0C
$09
$09
$09
$09
$07
$07
$07
$07
$05
$05
$05
$05
$03
$03
$03
$03
$02
$02
$02
$02
$01
$01
$01
$01
7.98
7.98
7.98
7.98
8.00
8.00
8.00
8.00
8.00
8.00
8.00
8.00
8.00
8.00
8.00
8.00
8.00
8.00
8.00
8.00
8.00
8.00
8.00
8.00
8.00
8.00
8.00
8.00
1000
47
0.43
2
100
4.7
1.0
0.33
220
10
1.2
5.5
12
157
157
157
157
201
201
201
201
251
251
251
251
402
402
402
402
502
502
502
502
668
668
668
668
1005
1005
1005
1005
10
4.3
3.3
7.5
21
2200
100
22
0.27
1.2
0.9
4.4
9.3
20.1
1
2.4
2.2
0.47
220
10
4.7
5.6
2200
100
2.
0.22
1.0
1
4.8
10.4
22.5
1.1
6.2
10.7
19.5
1
1
2.2
2.2
0.47
330
10
1
4.7
4.7
1.6
1.6
1.6
1.6
2
3300
100
33
0.15
0.82
1.5
3.3
1.0
470
22
10
2.7
4700
220
47
0.1
2
0.51
1.0
4.6
10
2
4.7
1.0
220
22
2
10
2.4
21.8
1.7
5.3
11.6
25.1
2.1
5.4
9.7
20.8
2.66
2.66
2.66
2.66
4
2200
220
47
0.12
0.43
1.0
4.7
1.0
220
33
10
2
2200
330
100
22
0.1
4
0.27
0.51
1.0
4
10
4
2.2
Advance Information
394
68HC(9)12D60 — Rev 4.0
MOTOROLA
Appendix: CGM Practical Aspects
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