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XC68HC912D60FU8 参数 Datasheet PDF下载

XC68HC912D60FU8图片预览
型号: XC68HC912D60FU8
PDF下载: 下载PDF文件 查看货源
内容描述: 超前信息 - 冯4.0 [Advance Information - Rev 4.0]
分类和应用: 微控制器和处理器外围集成电路时钟
文件页数/大小: 432 页 / 2948 K
品牌: MOTOROLA [ MOTOROLA ]
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Freescale Semiconductor, Inc.  
Appendix: CGM Practical Aspects  
Practical Aspects For The PLL Usage  
feature even in manual bandwidth control, offering then to the  
application software the same flexibility for the clocking control as the  
automatic mode.  
21.4.3 Filter Components Selection Guide  
21.4.3.1 Equations Set  
These equations can be used to select a set of filter components. Two  
cases are considered:  
1. The ‘tracking’ mode. This situation is reached normally when the  
PLL operates in automatic bandwidth selection mode (AUTO=1 in  
the PLLCR register).  
2. The ‘acquisition’ mode. This situation is reached when the PLL  
operates in manual bandwidth selection mode and forced  
acquisition (AUTO=0, ACQ=0 in the PLLCR register).  
In both equations, the power supply should be 5V. Start with the target  
loop bandwidth as a function of the other parameters, but obviously,  
nothing prevents the user from starting with the capacitor value for  
example. Also, remember that the smoothing capacitor is always  
assumed to be one tenth of the series capacitance value.  
So with:  
m:  
R:  
C:  
the multiplying factor for the reference frequency (i.e. (synr+1))  
the series resistance of the low pass filter in Ω  
the series capacitance of the low pass filter in nF  
: the target bus frequency expressed in MHz  
the desired damping factor  
F
bus  
ζ:  
F :  
the desired loop bandwidth expressed in Hz  
c
for the ‘tracking’ mode:  
1.675 – Fbus  
10.795  
2 109 ⋅ ζ2  
π ⋅ R C  
37.78 e----------------------------- R  
Fc = ------------------------- = -----------------------------------------------------  
2 ⋅ π ⋅ m  
68HC(9)12D60 — Rev 4.0  
MOTOROLA  
Advance Information  
391  
Appendix: CGM Practical Aspects  
For More Information On This Product,  
Go to: www.freescale.com  
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