Freescale Semiconductor, Inc.
Appendix: CGM Practical Aspects
Practical Aspects For The PLL Usage
Table 21-1. Suggested 8MHz Synthesis PLL Filter Elements (Tracking Mode)
Loop
Bandwidth
[kHz]
Bandwidth
Limit [kHz]
C [nF]
R [kΩ]
C [nF]
Reference [MHz]
SYNR
Fbus [MHz]
0
0
p
0.614
0.614
0.614
0.614
0.8
0.8
0.8
0.8
1
$0C
$0C
$0C
$0C
$09
$09
$09
$09
$07
$07
$07
$07
$05
$05
$05
$05
$03
$03
$03
$03
$02
$02
$02
$02
$01
$01
$01
$01
7.98
7.98
7.98
7.98
8.00
8.00
8.00
8.00
8.00
8.00
8.00
8.00
8.00
8.00
8.00
8.00
8.00
8.00
8.00
8.00
8.00
8.00
8.00
8.00
8.00
8.00
8.00
8.00
100
4.7
1.0
0.33
220
10
4.3
20
43
75
2.7
12
27
56
2.4
11
24
51
1.5
9.1
15
27
1.1
5.1
11
24
1.5
4.7
10
22
1.2
3
10
0.47
0.1
1.1
5.3
11.5
20
157
157
157
157
201
201
201
201
251
251
251
251
402
402
402
402
502
502
502
502
668
668
668
668
1005
1005
1005
1005
0.033
22
0.9
4.2
8.6
19.2
1
1.0
2.2
0.47
220
10
0.22
0.047
22
1
1.0
4.7
9.9
21.4
1
1
2.2
0.47
330
10
0.22
0.047
33
1
1.6
1.6
1.6
1.6
2
1.0
5.9
10.2
18.6
0.96
4.4
9.6
20.8
1.6
5.1
11
3.3
1.0
470
22
0.33
0.1
47
2
2.2
2
4.7
1.0
220
22
0.47
0.1
2
2.66
2.66
2.66
2.66
4
22
2.2
4.7
1.0
220
33
0.47
0.1
24
22
1.98
5.1
9.3
19.8
4
3.3
4
10
5.6
12
1.0
4
2.2
0.22
68HC(9)12D60 — Rev 4.0
MOTOROLA
Advance Information
393
Appendix: CGM Practical Aspects
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