欢迎访问ic37.com |
会员登录 免费注册
发布采购

XC68HC912D60FU8 参数 Datasheet PDF下载

XC68HC912D60FU8图片预览
型号: XC68HC912D60FU8
PDF下载: 下载PDF文件 查看货源
内容描述: 超前信息 - 冯4.0 [Advance Information - Rev 4.0]
分类和应用: 微控制器和处理器外围集成电路时钟
文件页数/大小: 432 页 / 2948 K
品牌: MOTOROLA [ MOTOROLA ]
 浏览型号XC68HC912D60FU8的Datasheet PDF文件第186页浏览型号XC68HC912D60FU8的Datasheet PDF文件第187页浏览型号XC68HC912D60FU8的Datasheet PDF文件第188页浏览型号XC68HC912D60FU8的Datasheet PDF文件第189页浏览型号XC68HC912D60FU8的Datasheet PDF文件第191页浏览型号XC68HC912D60FU8的Datasheet PDF文件第192页浏览型号XC68HC912D60FU8的Datasheet PDF文件第193页浏览型号XC68HC912D60FU8的Datasheet PDF文件第194页  
Freescale Semiconductor, Inc.  
Pulse Width Modulator  
Bit 7  
Bit 7  
0
6
6
0
5
5
0
4
4
0
3
3
0
2
2
0
1
1
0
Bit 0  
Bit 0  
0
RESET:  
PWSCNT0 — PWM Scale Counter 0 Value  
$0045  
PWSCNT0 is a down-counter that, upon reaching $00, loads the value  
of PWSCAL0. Read any time.  
Bit 7  
Bit 7  
0
6
6
0
5
5
0
4
4
0
3
3
0
2
2
0
1
1
0
Bit 0  
Bit 0  
0
RESET:  
PWSCAL1 — PWM Scale Register 1  
$0046  
Read and write anytime. A write will cause the scaler counter PWSCNT1  
to load the PWSCAL1 value unless in special mode with DISCAL = 1 in  
the PWTST register.  
PWM channels 2 and 3 can select clock S1 (scaled) as its input clock by  
setting the control bit PCLK2 and PCLK3 respectively. Clock S1 is  
generated by dividing clock B by the value in the PWSCAL1 register + 1  
and dividing again by two. When PWSCAL1 = $FF, clock B is divided by  
256 then divided by two to generate clock S1.  
Bit 7  
Bit 7  
0
6
6
0
5
5
0
4
4
0
3
3
0
2
2
0
1
1
0
Bit 0  
Bit 0  
0
RESET:  
PWSCNT1 — PWM Scale Counter 1 Value  
$0047  
PWSCNT1 is a down-counter that, upon reaching $00, loads the value  
of PWSCAL1. Read any time.  
Advance Information  
190  
68HC(9)12D60 — Rev 4.0  
Pulse Width Modulator  
MOTOROLA  
For More Information On This Product,  
Go to: www.freescale.com  
 复制成功!