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XC68HC912D60FU8 参数 Datasheet PDF下载

XC68HC912D60FU8图片预览
型号: XC68HC912D60FU8
PDF下载: 下载PDF文件 查看货源
内容描述: 超前信息 - 冯4.0 [Advance Information - Rev 4.0]
分类和应用: 微控制器和处理器外围集成电路时钟
文件页数/大小: 432 页 / 2948 K
品牌: MOTOROLA [ MOTOROLA ]
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Freescale Semiconductor, Inc.  
Pulse Width Modulator  
RDPP — Reduced Drive of Port P  
0 = All port P output pins have normal drive capability.  
1 = All port P output pins have reduced drive capability.  
PUPP — Pull-Up Port P Enable  
0 = All port P pins have an active pull-up device disabled.  
1 = All port P pins have an active pull-up device enabled.  
PSBCK — PWM Stops while in Background Mode  
0 = Allows PWM to continue while in background mode.  
1 = Disable PWM input clock when the part is in background mode.  
Bit 7  
DISCR  
0
6
DISCP  
0
5
DISCAL  
0
4
0
0
3
0
0
2
0
0
1
0
0
Bit 0  
0
0
RESET:  
PWTST — PWM Special Mode Register (“Test”)  
$0055  
Read anytime but write only in special mode (SMODN = 0). These bits  
are available only in special mode and are reset in normal mode.  
DISCR — Disable Reset of Channel Counter on Write to Channel  
Counter  
0 = Normal operation. Write to PWM channel counter will reset  
channel counter.  
1 = Write to PWM channel counter does not reset channel counter.  
DISCP — Disable Compare Count Period  
0 = Normal operation  
1 = In left-aligned output mode, match of period does not reset the  
associated PWM counter register.  
DISCAL — Disable Load of Scale-Counters on Write to the Associated  
Scale-Registers  
0 = Normal operation  
1 = Write to PWSCAL0 and PWSCAL1 does not load scale  
counters  
Advance Information  
194  
68HC(9)12D60 — Rev 4.0  
Pulse Width Modulator  
MOTOROLA  
For More Information On This Product,  
Go to: www.freescale.com  
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