Freescale Semiconductor, Inc.
Clock Functions
SYSCLK = (BCSP & PLLCLK) | (BCSP & BCSS & EXTALi) | (BCSP &
BCSS & SLWCLK)
MCLK = (PCLK & MCS) | (XCLK & MCS)
MSCAN system = (EXTALi & CLKSRC) | (SYSCLK & CLKSRC)
BDM system = (BCLK & CLKSW) | (ECLK & CLKSW)
NOTE: During limp-home mode PCLK, ECLK, BCLK, MCLK and XCLK are
supplied by VCO (PLLCLK).
12.8 Clock Divider Chains
Figure 12-6, Figure 12-7, Figure 12-8, and Figure 12-9 summarize the
clock divider chains for the various peripherals on the 68HC(9)12D60.
Advance Information
168
68HC(9)12D60 — Rev 4.0
Clock Functions
MOTOROLA
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MOTOROLA [ MOTOROLA ]
