The halted processing state is an indication of catastrophic hardware failure. For ex-
ample, if during the exception processing of a bus error another bus error occurs, the
processor assumes that the system is unusable and halts.
The background processing state is initiated by breakpoints, execution of special in-
structions, or a double bus fault. Background processing is enabled by pulling BKPT
low during RESET. Background processing allows interactive debugging of the sys-
tem via a simple serial interface.
5.7 Privilege Levels
The processor operates at one of two levels of privilege: user or supervisor. Not all in-
structions are permitted to execute at the user level, but all instructions are available
at the supervisor level. Effective use of privilege level can protect system resources
from uncontrolled access. The state of the S bit in the status register determines the
privilege level and whether the user stack pointer (USP) or supervisor stack pointer
(SSP) is used for stack operations.
5.8 Instructions
The CPU32 instruction set is summarized in Table 5-1. The instruction set of the
CPU32 is very similar to that of the MC68020. Two new instructions have been added
to facilitate controller applications: low-power stop (LPSTOP) and table lookup and in-
terpolate (TBLS, TBLSN, TBLU, TBLUN).
5
The following MC68020 instructions are not implemented on the CPU32:
BFxxx
— Bit Field Instructions (BFCHG, BFCLR, BFEXTS, BFEXTU,
BFFFO, BFINS, BFSET, BFTST)
CALLM, RTM — Call Module, Return Module
CAS, CAS2
cpxxx
— Compare and Swap (Read-Modify-Write Instructions)
— Coprocessor Instructions (cpBcc, cpDBcc, cpGEN, cpRESTORE,
cpSAVE, cpScc, cpTRAPcc)
PACK, UNPK — Pack, Unpack BCD Instructions
Memory — Memory Indirect Addressing Modes
The CPU32 traps on unimplemented instructions or illegal effective addressing
modes, allowing user-supplied code to emulate unimplemented capabilities or to de-
fine special purpose functions. However, Motorola reserves the right to use all current-
ly unimplemented instruction operation codes for future M68000 core enhancements.
MOTOROLA
5-10
CENTRAL PROCESSING UNIT
MC68331
USER’S MANUAL
MOTOROLA [ MOTOROLA ]
