Preliminary Information
MT93L16
Address:
03h Read
Firmware Revision Code Register (FRC)
7
6
5
4
3
2
1
0
Power Up
Reset 00h
-
FRC
-
FRC
FRC
-
-
2
-
0
1
MSB
LSB
-
-
-
-
RESERVED
FRC
FRC
FRC
0
1
2
Revision code of the firmware program currently being run (default=rom=00).
Address:
3fh R / W
Bootload RAM Control Register (BRC)
7
6
5
4
3
2
1
0
Power Up
Reset 00h
-
-
-
-
-
BOOT
RAM_ROMb
-
MSB
LSB
C
C
C
C
RESERVED. Must be set to zero.
RESERVED. Must be set to zero.
0
1
2
3
BOOT bit. When high, puts device in bootload mode. When low, bootload is disabled.
RAM_ROMb bit. When high, device executes from RAM. When low, device executes from ROM.
-
-
-
RESERVED
Address:
07h Read
Bootload RAM Signature Register (SIG)
7
6
5
4
3
2
1
0
Power Up
Reset FFh
SIG
SIG
SIG
SIG
SIG
SIG
SIG
2
SIG
1
0
4
7
6
5
3
MSB
LSB
SIG
SIG
SIG
SIG
SIG
SIG
SIG
SIG
7
6
5
4
3
2
1
0
This register provides the signature of the bootloaded data to verify error-free delivery into the device.
Note: this register is only accessible if BOOT bit is high (bootload mode enabled) in the above BRC register. While
bootload is disabled, the register value is held constant at its reset seed value of FFh.
25