MT93L16
ENA1
MD1
ENA2
MD2
Rin
Sin
IC
MCLK
IC
IC
IC
LAW
FORMAT
RESET
NC
NC
SCLK
CS
1
36
35
2
34
3
33
4
5
32
31
6
30
7
29
8
9
QSOP
28
27
10
26
11
25
12
24
13
23
14
22
15
21
16
20
17
19
18
IC
IC
IC
MCLK2
NC
VSS
VDD2
VSS2
IC
IC
BCLK/C4i
F0i
Rout
Sout
VDD
NC
DATA1
DATA2
Preliminary Information
Figure 2 - Pin Connections
Pin Description
Pin #
1
Name
ENA1
Description
SSI Enable Strobe / ST-BUS & GCI Mode for Rin/Sout (Input).
This pin has dual functions
depending on whether SSI or ST-BUS/GCI is selected. For SSI, this strobe must be present
for frame synchronization. This is an active high channel enable strobe, 8 or 16 data bits
wide, enabling serial PCM data transfer for on Rin/Sout pins. Strobe period is 125
microseconds. For ST-BUS or GCI, this pin, in conjunction with the MD1 pin, selects the
proper mode for Rin/Sout pins (see ST-BUS and GCI Operation description).
ST-BUS & GCI Mode for Rin/Sout (Input).
When in ST-BUS or GCI operation, this pin, in
conjunction with the ENA1 pin, will select the proper mode for Rin/Sout pins (see ST-BUS
and GCI Operation description). Connect this pin to Vss in SSI mode.
SSI Enable Strobe / ST-BUS & GCI Mode for Sin/Rout (Input).This
pin has dual functions
depending on whether SSI or ST-BUS/GCI is selected. For SSI, this is an active high channel
enable strobe, 8 or 16 data bits wide, enabling serial PCM data transfer on Sin/Rout pins.
Strobe period is 125 microseconds. For ST-BUS/GCI, this pin, in conjunction with the MD2
pin, selects the proper mode for Sin/Rout pins (see ST-BUS and GCI Operation description).
ST-BUS & GCI Mode for Sin/Rout (Input).When
in ST-BUS or GCI operation, this pin in
conjunction with the ENA2 pin, selects the proper mode for Sin/Rout pins (see ST-BUS and
GCI Operation description). Connect this pin to Vss in SSI mode.
Receive PCM Signal Input (Input).
128 kbit/s to 4096 kbit/s serial PCM input stream. Data
may be in either companded or 2’s complement linear format. This is the Receive Input
channel from the line (or network) side. Data bits are clocked in following SSI, GCI or ST-
BUS timing requirements.
Send PCM Signal Input (Input).
128 kbit/s to 4096 kbit/s serial PCM input stream. Data may
be in either companded or 2’s complement linear format. This is the Send Input channel
(from the microphone). Data bits are clocked in following SSI,GCI or ST-BUS timing
requirements.
Internal Connection (Input):
Must be tied to Vss.
Master Clock (Input):
Nominal 20 MHz Master Clock input (may be asynchronous relative
to 8KHz frame signal.) Tie together with MCLK2 (pin 33).
Internal Connection (Input):
Must be tied to Vss.
A/µ Law Select (Input).
When low, selects
µ−Law
companded PCM. When high, selects A-
Law companded PCM. This control is for both serial pcm ports.
2
MD1
3
ENA2
4
MD2
5
Rin
6
Sin
7
8
9,10,11
12
13
IC
MCLK
IC
LAW
FORMAT
ITU-T/Sign Mag (Input).
When low, selects sign-magnitude PCM code. When high, selects
ITU-T (G.711) PCM code. This control is for both serial pcm ports.
2
MITEL [ MITEL NETWORKS CORPORATION ]
