MT90810
Preliminary Information
OE/CE
RESERVED
DC/CSTo
MC
CAB8
7
6
5
4
3
2
1
0
Figure 11 - Connection Memory High Byte
Description
Bit
7:4
Name
RESERVED
DC
3
Direction Control. controls the direction of the MVIP DSi/DSo channel pair.
When DC is set, DSi is the input channel and DSo is the output channel. When DC
is clear the direction is reversed.
2
MC
Message Channel. This bit, when set, will send the eight bits of connection memory
low directly out the corresponding output channel and stream. When the bit is
cleared, the contents of the programmed location in connection memory low act as
an address for the data memory and so determine the source of the corresponding
output channels and stream.
1
0
OE
Output Enable. This bit, when set, enables the output drivers on a per-channel
basis. This allows individual channels on individual streams to be made high-
impedance, permitting the construction of switch matrices. When this bit is cleared,
the drivers are disable.
CAB8
Source Channel Address Bit 8. This bit, together with bits CAB0-7 in connection
memory low, is used to select one of 384 different source input channels for the
connection.
Table 21 - Connection Memory High Bits for MVIP channels
2-164
MITEL [ MITEL NETWORKS CORPORATION ]
