MT9076
Preliminary Information
All the interrupts of the MT9076 in T1 and E1 mode are maskable. This is accomplished through interrupt mask
words zero to three, which are located on page 1, addresses 1BH to 1EH and the (optional) HDLC interrupt
mask located at address 16 of page B.
After a MT9076 reset (RESET pin or RST control bit), all interrupts are masked.
All interrupts may be suspended, without changing the interrupt mask words, by making the SPND control bit of
page 1, address 1AH high.
All interrupts are cleared by forcing the pin TxAO low
18.1
Interrupts on T1 Mode
Interrupt Mask Word Zero
Bit 7
Bit 0
TFSYNI MFSYNI TSAI
AISI
LOSI
SEI
TxSLPI RxSLPI
Interrupt Mask Word One
Bit 7
Bit 0
FEI
CRCI YELI COFAI LCVI PRBSI PDVI
- - -
Interrupt Mask Word Two
Bit 7
Bit 0
FEO CRCO OOFO COFAO LCVO PRBSO MFOOFO - - -
Interrupt Mask Word Three
Bit 7
Bit 0
- - -
- - -
- - -
LCDI 1SECI 5SECI BIOMI SIGI
HDLC Interrupt Masks
Bit 7
Bit 0
Ga
EOPD TEOP EopR TxFl FATxU RxFf RxOv
18.2
Interrupts on E1 Mode
Interrupt Mask Word Zero
Bit 7
Bit 0
SYNI
MFSYI CSYNI AISI
LOSI CEFI
YI
SLPI
Interrupt Mask Word One
Bit 7
Bit 0
FERI
CRCI
EBI
AIS16I LCVI PRBSI AUXPI RAII
Interrupt Mask Word Two
Bit 7
Bit 0
FEOM CRCO EBOI
- - -
LCVO PRBSO PRBSMO
- - -
56
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