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MT90220 参数 Datasheet PDF下载

MT90220图片预览
型号: MT90220
PDF下载: 下载PDF文件 查看货源
内容描述: 八IMA / UNI PHY设备 [Octal IMA/UNI PHY Device]
分类和应用:
文件页数/大小: 116 页 / 305 K
品牌: MITEL [ MITEL NETWORKS CORPORATION ]
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MT90220  
7.7 RX Delay Registers Description  
Tables 66 to 75 describe the RX Delay registers.  
Address (Hex):  
Synchronized access  
Reset Value (Bin):  
280  
1X000000  
Bit #  
Type  
Description  
7
R
Upon a write to this register, the bit will go to 0 and will return to 1 when the transfer is  
completed  
6
5
R
Toggle Bit.  
R/W  
Write 0 to initiate a transfer from the MT90220 registers to the external RAM.  
Write 1 to initiate a transfer from the external RAM to the MT90220 registers.  
4
3
R/W  
R/W  
Reserved, write 0 for normal operation.  
When Test Mode bit is 1; write 1 to enable the direct addressing mode to the External  
SRAM.  
2
R/W  
R/W  
When Test Mode bit is 1; write 0 for normal operation.Write 1 for disabling all access to  
the external RAM except for the uP port (for RAM test purposes)  
1:0  
When bit 1 is 1, there is no access to the external RAM (no reset or read or write action  
done).  
When bit 1 is 0 and bit 0 is 0, then the external RAM is initialized.  
When bit 1 is 0 and bit 0 is 1, then a read or write access to the external RAM is  
performed, as defined by bit 5.  
Table 66 - RX External SRAM Control Register  
Address (Hex):  
Direct access  
281  
Used to increment or decrement the recombiner delay for an IMA Group.  
The value is in the Guardband/Delta Delay register  
00  
Reset Value (Hex):  
Bit #  
Type  
Description  
7
R/W  
Write a 1 to decrement the recombiner delay of IMA Group #3. The bit will return to 0  
when the delay is adjusted. Writing a 0 has no effect.  
6
5
4
3
2
1
0
R/W  
R/W  
R/W  
R/W  
R/W  
R/W  
R/W  
Write a 1 to increment the recombiner delay of IMA Group #3. The bit will return to 0 when  
the delay is adjusted. Writing a 0 has no effect.  
Write a 1 to decrement the recombiner delay of IMA Group #2. The bit will return to 0  
when the delay is adjusted. Writing a 0 has no effect.  
Write a 1 to increment the recombiner delay of IMA Group #2. The bit will return to 0 when  
the delay is adjusted. Writing a 0 has no effect.  
Write a 1 to decrement the recombiner delay of IMA Group #1. The bit will return to 0  
when the delay is adjusted. Writing a 0 has no effect.  
Write a 1 to increment the recombiner delay of IMA Group #1. The bit will return to 0 when  
the delay is adjusted. Writing a 0 has no effect.  
Write a 1 to decrement the recombiner delay of IMA Group #0. The bit will return to 0  
when the delay is adjusted. Writing a 0 has no effect.  
Write a 1 to increment the recombiner delay of IMA Group #0. The bit will return to 0 when  
the delay is adjusted. Writing a 0 has no effect.  
Table 67 - Increment/Decrement Delay Control Register  
62  
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