MT90220
ST-BUS
Bit Cells
(DSTx0-7)
Channel 31 bit 0
Bit Cell
Channel 0 bit 7
Channel 0 bit 0
Channel 1 bit 7
Bit Cell
...
...
Serial Bit
Stream
Unused or
High Impedance
Unused or
High Impedance
...
...
...
...
TXSYNC
TXCK
...
...
...
RXSYNC
RXCK
...
...
...
ST-BUS
Bit Cells
at DSTx0-7
Channel 15 bit 0
Bit Cell
Channel 16 bit 7
Channel 16 bit 0
Channel 17 bit 7
Bit Cell
...
...
Serial Bit
Stream
Unused or
High Impedance
Unused or
High Impedance
...
...
TXSYNC
...
...
...
...
...
TXCK
RXSYNC
RXCK
...
...
Figure 13 - Mode 3 and 7: Generic PCM Interface for E1
DSTi
RXCK
RXSYNC
Cell Delineation
S/P
TXSYNC
TX Cell FIFO
P/S
DSTo
TXCK
RXCK 0-7
REFCK 0-3
PLLREF0
PLLREF1
RXCK 0-7
Figure 14 - TXCK and TXSYNC Output Pin Source Options
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