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MT90220 参数 Datasheet PDF下载

MT90220图片预览
型号: MT90220
PDF下载: 下载PDF文件 查看货源
内容描述: 八IMA / UNI PHY设备 [Octal IMA/UNI PHY Device]
分类和应用:
文件页数/大小: 116 页 / 305 K
品牌: MITEL [ MITEL NETWORKS CORPORATION ]
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MT90220  
clock and frame pulse are fixed and must conform to  
the ST-BUS specification.  
The MITEL ST-BUS has 32 channels numbered 0 to  
31. Two different mapping schemes are selectable.  
The spaced mapping scheme uses 3 of every 4  
channels. The grouped scheme uses the first 24  
channels. Refer to Table 8 for details of Spaced DS-1  
mapping, Table 9 for Grouped DS1 mapping. All  
unused channels are tri-state.  
The RXCK and RXSYNC pins are always defined as  
inputs and are generated by external circuitry.  
4.2.1 Mode 2 and 6: ST-BUS Interface for T1  
In PCM Mode 2 the TXCK and TXSYNC pins are  
defined as Inputs and in PCM Mode 6, the TXCK and  
TXSYNC are defined as outputs. The RXCK and  
RXSYNC are always defined as input pins.  
The MITEL ST-BUS clock value is 4.096 MHz. The  
frame pulse is 8 kHz and should be as defined in  
Figure 9 or Figure 10 (see MITEL Application Note  
MSAN-126).  
In T1 applications, a DS-1 frame is 193 bits long and  
corresponds to 1 framing bit and 192 payload bits.  
The 192 payload bits are divided as 24 channels or  
time slots of 8 bits each.  
In the PCM Mode 6, the TXCK and TXSYNC pins are  
defined as outputs. The source for the TXCK is  
selected using TX PCM Link Control register  
number 2 and can be any of the eight RXCK or four  
external REFCK clocks. As there is no PLL inside the  
MT90220, the source frequency has to be a valid ST-  
DS1 Time slots  
-
1
1
2
2
3
3
-
4
5
5
6
6
7
-
7
9
8
9
-
1
0
1
1
1
2
Voice/Data Channels  
(DSTi/o)  
ST-BUS  
0
x
4
x
8
x
1
0
1
1
1
2
x
1
3
1
4
1
5
DS1 Time slots  
-
1
3
1
4
1
5
-
1
6
1
7
1
8
-
1
9
2
0
2
1
-
2
2
2
3
2
4
Voice/Data Channels  
(DSTi/o)  
ST-BUS  
1
6
x
1
7
1
8
1
9
2
0
x
2
1
2
2
2
3
2
4
x
2
5
2
6
2
7
2
8
x
2
9
3
0
3
1
Table 8 - T1Channel Mapping Using 3 Channels Every 4 Channels  
ST-BUS  
Bit Cells  
(DSTx0-7)  
...  
Chan. 31 bit 0  
Bit Cell  
Chan. 0 bit 7  
Chan. 0 bit 0  
Chan. 1 bit 7  
Bit Cell  
...  
Serial Bit  
Stream  
Unused or  
High Impedance  
Unused or  
High Impedance  
...  
...  
...  
...  
TXSYNC0-7  
RXSYNC0-7  
TXCK 0-7  
RXCK 0-7  
...  
...  
...  
ST-BUS  
Bit Cells  
at DSTx0-7  
Chan. N-1 bit 0  
Bit Cell  
Chan. N bit 7  
Chan. N bit 0  
Chan. N+1 bit 7  
Bit Cell  
...  
...  
...  
...  
Serial Bit  
Stream  
Unused or  
High Impedance  
Unused or  
High Impedance  
...  
...  
...  
TXSYNC0-7  
RXSYNC0-7  
TXCK 0-7  
RXCK 0-7  
NOTE: The value N is 0, 4, 8, 12, 16, 20, 24 or 28 and corresponds to the unused channels.  
Figure 9 - PCM Mode 2 and 6: ST-BUS Interface for T1 (Spaced Mapping)  
25  
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