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MT90220 参数 Datasheet PDF下载

MT90220图片预览
型号: MT90220
PDF下载: 下载PDF文件 查看货源
内容描述: 八IMA / UNI PHY设备 [Octal IMA/UNI PHY Device]
分类和应用:
文件页数/大小: 116 页 / 305 K
品牌: MITEL [ MITEL NETWORKS CORPORATION ]
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MT90220  
Pin Description (continued)  
Pin #  
Name  
I/O  
Description  
9, 10, 11,  
12, 13  
RxAddr  
[4:0]  
I
Receive Address. Five bit wide true data driven from the ATM to PHY layer to  
select the appropriate MT90220. RxAddr[4] is the MSB. Each MT90220 keeps its  
address. The value for the Tx and Rx portions of the MT90220 can be different.  
Receiver Static Memory Interface Signals (see Note 1)  
188, 189,  
190, 191,  
192, 195,  
196,197  
sr_d  
[7:0]  
I/O Static Memory Data Bus. Data Bus to exchange data between the MT90220 and  
the external static memory.  
162, 163,  
164, 165,  
166, 169,  
170, 171,  
172, 175,  
176, 177,  
178, 179,  
182, 183,  
184, 185,  
186  
sr_a  
[18:0]  
O Static Memory Address Bus. The signal is used to select an entry in the external  
static memory.  
187  
sr_we  
O Static Memory Read/Not Write. If low, data is written from the MT90220 to the  
memory. If high, data is read from the memory to the MT90220.  
198, 199 sr_cs_1, 0 O Static Memory Chip Control Signal.  
Processor Interface Signals (see Note 2)  
44, 45, 46,  
47, 48, 49,  
50, 51  
up_d  
[7:0]  
I/O Processor Data Bus. Data Bus to exchange data between the MT90220 and a  
local processor.  
55, 56, 57,  
58, 59, 60,  
61, 62, 63,  
64, 65  
up_a  
[10:0]  
I
I
Processor Address Bus. They are used to select the internal registers and  
memory positions of the MT90220.  
41  
up_r/w  
or  
up_wr  
Processor Read/Not Write. Motorola Mode. This is an input signal. If low, data is  
written from the processor to the MT90220. If high, data is read from the MT90220  
to the processor.  
Processor Not Write (Intel Mode). This is an input signal. If low, data is written  
from the processor to the MT90220. De-asserting this signal to high will terminate a  
write access cycle.  
40  
39  
67  
up_oe  
or  
up_rd  
I
I
Output enable Motorola Mode. This is an input signal. This signal should be tied  
to GND for Motorola timing mode.  
Processor Not Read (Intel Mode). This is an input signal. If low, data is read from  
the MT90220.  
up_cs  
up_irq  
Processor Chip Select. This is an active low input signal. If this signal is high, the  
MT90220 ignores all other signals on its processor bus. If this signal is low, the  
MT90220 accepts the signals on its processor bus. De-asserting this signal to high  
will terminate an access cycle.  
O Processor Interrupt Request. If this signal is low, the MT90220 signals to the  
processor that an interrupt condition is pending inside the MT90220. Otherwise no  
interrupt is pending inside the MT90220. Open drain signal.  
PCM Interface Signals  
5
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