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MT90220 参数 Datasheet PDF下载

MT90220图片预览
型号: MT90220
PDF下载: 下载PDF文件 查看货源
内容描述: 八IMA / UNI PHY设备 [Octal IMA/UNI PHY Device]
分类和应用:
文件页数/大小: 116 页 / 305 K
品牌: MITEL [ MITEL NETWORKS CORPORATION ]
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MT90220  
Pin Description (continued)  
Pin #  
Name  
I/O  
Description  
81,88, 90,  
97,99,107,  
109,116  
DSTo  
[7:0]  
O Serial PCM Data Output 7-0. A 1.544 Mbit/s or 2.048 Mbps serial stream which  
contain 24 (T1) or 32 (E1) PCM or data channels received on T1 or E1 line. The  
output is set to high impedance for unused channels and if the link is not used.  
118, 124,  
127, 134,  
136, 143,  
145, 151  
DSTi  
[7:0]  
I
Serial PCM Data Input 7-0. A 1.544 Mbit/s or 2.048 Mbps serial stream which  
contains the 24 (T1) or 32 (E1) PCM or data channels on T1 or E1 line.  
83, 85, 92, TXCKi/o I/O PCM Interface Transmit Clock 7-0. This pin is an input for PCM Modes 2, 4, 5 and  
94, 101,  
103, 111,  
113  
[7:0]  
7. It is an output for Interface Modes 1, 3, 6 and 8 (see Section 4.2, PCM System  
Interface Modes).  
It is the clock for serial PCM data transmission of the T1 and E1 framers. The TXCK  
source is software selectable and can be either one of the eight RXCK or one of the  
four REFCK signals. It is used for internal transmit timing and should be connected  
to the Transmit Clock of the framer.  
1. The TXCK is 4.096 MHz for ST-BUS applications.  
2. For generic PCM Interfaces (non ST-BUS or asynchronous line termination),  
these outputs can be programmed to provide either a 1.544 MHz (T1) or 2.048  
MHz (T1 or E1) clock.  
80, 87, 89, TXSYNCio I/O Transmit Line 8KHz Frame Pulse 7-0. This pin is an input for Interface Modes 2,  
96, 98,  
106, 108,  
115  
[7:0]  
4, 5 and 7. It is an output for Interface Modes 1, 3, 6 and 8 (see PCM Section 4.2,  
PCM System Interface Modes).  
It is the 8 kHz reference used as transmit synchronization for the PCM system  
interface. When an output, the TXSYNC is generated from the TXCK signal and is  
independent from other TXSYNC signals. Two output modes can be programmed:  
1. For ST-BUS applications, it is a low going pulse (F0), that delimits the 32 channel  
frame of the ST-BUS interface at DSTi and DSTo lines (see Figure 25 - ST-BUS  
Timing Diagram for this sync pulse). The frame pulse is typically received through  
the RXSYNC[0] pin.  
2. For generic PCM Interfaces, it can be programmed to generate either a positive  
or negative pulse polarity that lines up with the first bit of the PCM system interface.  
117, 125, RXSYNCi  
I
Receive line 8KHz Frame Pulse 7-0. This signal represents the 8 KHz reference  
received from the incoming T1 or E1 line. The MT90220 can be programmed to  
accept different 8 KHz pulse formats at this input.  
1. For ST-BUS applications, it is a low going pulse (F0), which delimits the 32  
channel frame of ST-BUS interface at DSTi and DSTo lines. See STBUS timing  
diagram for this sync pulse.  
126, 133,  
135, 142,  
144, 150  
[7:0]  
2. For generic PCM Interfaces, it can be programmed to accept either positive or  
negative pulse polarities.  
120, 122,  
129, 131,  
138, 140,  
146, 148  
RXCKi  
[7:0]  
I
PCM Interface Receive Clock 7-0. This input line represents the clock for the  
receive serial PCM data of the T1 and E1 framers. The T1 or E1 frequency value to  
be received at this input clock is defined by the user through an internal register.  
1. For ST-BUS applications, input pin RXCKi receives the 4.096 MHz signal.  
2. For generic PCM Interfaces, these inputs can be programmed to accept either a  
1.544 MHz (T1) or 2.048 MHz (T1 or E1) clock.  
154, 155  
PLLREF  
[1:0]  
O Output reference to an external PLL. See 4.3 Description of the PCM Interface  
for details.  
158, 159,  
160, 161  
REFCK  
[3:0]  
I
Input reference clock inputs 3 to 0. Receive the de-jittered transmit clock  
reference to be internally routed to the T1/E1 framer transmit clocks (output pins  
TXCK[7:0]. See “Description of the PCM Interface” on page 23. for more details.  
System Signals  
6