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ACE9030MIWFP2Q 参数 Datasheet PDF下载

ACE9030MIWFP2Q图片预览
型号: ACE9030MIWFP2Q
PDF下载: 下载PDF文件 查看货源
内容描述: 无线接口和双合成器 [Radio Interface and Twin Synthesiser]
分类和应用: 无线
文件页数/大小: 39 页 / 382 K
品牌: MITEL [ MITEL NETWORKS CORPORATION ]
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ACE9030  
ELECTRICAL CHARACTERISTICS  
These characteristics apply over these ranges of conditions (unless otherwise stated):  
TAMB = – 40 °C to + 85 °C, VDD = + 3·6 to + 5·0 V, GND ref. = VSS  
D.C. Characteristics (continued)  
Parameter  
Min.  
Typ.  
Max.  
Unit Conditions  
Synthesiser charge pump current  
Current setting resistor RSMA  
Current setting resistor RSC  
19  
19  
39  
39  
78  
78  
kNote 3  
kNote 3  
External capacitance on pin RSMA  
External capacitance on pin RSC  
Bias current IRSMA (nominally 1·25V / RSMA  
Bias current IRSC (nominally 1·25V / RSC)  
Iprop(0) scaling accuracy, pin PDP  
Iprop(1) scaling accuracy, pin PDP  
Iint scaling accuracy, pin PDI  
Icomp(0) scaling accuracy, pin PDP  
5
5
pF Ensures stable  
pF bias current.  
µA RSMA = 39 kΩ  
µA RSC = 39 kΩ  
)
28·8  
28·8  
–10  
–10  
–10  
–10  
32  
32  
35·2  
35·2  
+10  
+10  
+10  
+10  
%
%
%
%
@ 200 µA. Note 4  
@ 800 µA. Note 4  
@ 4 mA. Note 4  
@ ACC x 0·2 µA  
Note 4  
Icomp(1) scaling accuracy, pin PDP  
Icomp(2) scaling accuracy, pin PDI  
–10  
–10  
+10  
+10  
%
%
@ ACC x 0·8 µA  
Note 4  
@ ACC x 4 µA  
Note 4  
Iauxil scaling accuracy, pin PDA  
Auxiliary Charge Pump,  
–5  
–10  
+5  
+10  
%
%
@ 256 µA. Note 4  
Note 5  
Up or Down IAUX current variation  
Main Charge Pumps,  
–10  
+10  
%
Note 6  
Up or Down IMAIN or IINTEGRAL current variation  
Iprop(0) or Iprop(1) setting from PDP pin  
Iint setting from PDI pin  
Icomp(0) or Icomp(1) setting from PDP pin  
Icomp(2) setting from PDI pin  
1·0  
5
12  
180  
512  
mA  
mA  
µA  
µA  
µA  
Iauxil setting from PDA pin  
Notes  
3. The circuit is defined with resistors RSMA and RSC connected from pins RSMA and RSC to VSSSA but in most practical applications all VSS pins  
will be connected to a ground plane so RSMA and RSC should then also be connected to this ground plane.  
4. The charge pump currents are specified to this accuracy when the relevant output pin is at a potential of VDD/2 and with RSMA = 39 k, CN  
= 200, L= 1, K = 5, RSC = 19 kΩ. The nominal value is set by external resistors and by programming registers, as defined in Table 6. Tolerances  
in the internal Bandgap voltage and bias circuits are within the limits given for IRSMA and IRSC, the scaling accuracy of the multiplying DAC’s  
is within these limits given for Iprop(0), Iprop(1), Iint, Icomp(0), Icomp(1), Icomp(2), and auxil.  
5. The Auxiliary charge pump output voltage is referred to as VPDA and the output current IAUX is the Up or Down current measured when  
VPDA = VDD/2.  
The conditions for the variation limits for the Up current are:  
either  
or  
IAUX = 128 or 256 µA  
IAUX = 512 µA  
and  
and  
0 < VPDA < VDD – 0·5 V  
0 < VPDA < VDD – 0·65 V  
The conditions for the variation limits for the Down current are:  
either  
or  
IAUX = 128 or 256 µA  
IAUX = 512 µA  
and  
and  
0·5 V < VPDA < VDD  
0·65 V < VPDA < VDD  
6. The Main charge pump output voltage at pin PDP is referred to as VPDP and at pin PDI as VPDI. The output currents IMAIN and IINTEGRAL are the  
up or down current Iprop(0), Iprop(1) or Iint measured when VPDP or VDPI = VDD/2.  
The conditions for the variation limits for the Up current are :  
IMAIN = 100 to 1000 µA or IINTEGRAL = 1 to 5 mA and 0 < VPDP < VDD – 0·45 V  
The conditions for the variation limits for the Down current are:  
IMAIN = 100 to 1000 µA or IINTEGRAL = 1 to 5 mA and 0·45 V < VPDP < VDD  
6