ACE9030
Increment
( = NF )
Accumulator
value
...previous values
Division
Ratio
and in this case the phase error increases in the opposite
direction each cycle by:
3
3
3
3
3
3
3
3
3
3
5
0
3
6
1
4
7
2
NTOT
NTOT + 1
NTOT
NTOT
NTOT + 1
NTOT
NTOT
NTOT + 1
NTOT
(F - 1)
x (fCOMP Period) .... (3)
& overflows
& overflows
(NTOT + 1)
This phase error gives an unwanted correction pulse on
theØUP output, astheVCOfrequencyistoolowforthedivision
ratio in use.
Any phase can be considered to be the locked condition
so to simplify later calculations the phase given by a ÷ (NTOT
+ 1) cycle which leaves 000 in the accumulator will be chosen
asthelockedstateandcompensationwillbeaddedtoachieve
this. Only unwanted ØDOWN outputs then need to be removed
by cancellation and also that the total phase error in any cycle,
based on formula (2), is given by replacing F, the fraction
required, by the current sum of fractions, which is the value of
the accumulator ACC divided by the modulus in use. This
replacement is clearly valid if the state of the accumulator is
considered when starting from a zero value and then adding
the fractional count each cycle until an overflow is reached;
when starting from a non-zero value there is some residual
phase error from the overflow state so the accumulator still
gives the correct phase error. Thus the phase error needing
correction on the loop filter is:
& overflows
& overflows
5
0
NTOT + 1
and so on...
Table 7
disturbed by the variations in division ratio but there is still
some frequency modulation given by the Fractional-N opera-
tion. The simplest way to remove this ripple on the synthesiser
is to use a lower bandwidth loop filter but this also removes all
of the advantage of fast channel change when using Frac-
tional-N, so the method used in ACE9030 is to calculate the
waveform of the ripple and then inject a compensation signal
onto the loop filter.
Fractional-N Compensation
If the Fractional-N system is operating correctly the
synthesiser sets the VCO frequency so that:
ACC
Phase error =
x (fCOMP Period) .... (4)
NTOT x MOD
This error could be cancelled by a phase shift on the
comparison clock from the reference divider but this is very
difficult in practice so the method used in ACE9030 is to add
an extra charge pump to the loop filter to directly cancel the
pulse given by the normal charge pump due to this phase
error. The current given by the proportional charge pump is
Iprop(0) in normal mode or Iprop(1) in speed-up mode so
taking normal mode first the charge that must be cancelled is:
fVCO = fCOMP x (NTOT + F) .... (1)
where F is the fraction given by:
NF
NF is the fraction set in Word A or A2
MOD is the modulus, 5 or 8
F=
MOD
The total division alternates between NTOT and NTOT + 1 so
the frequency seen at the phase comparator will also alter-
nate. This divided signal fFRACN is compared with the uniform
comparison frequency fCOMP and will give a phase error due to
the different periods. There will also be some phase error due
to leakage on the loop filter, leading to some correction pulses
on the charge pumps to maintain lock, but these will be very
small in a well designed synthesiser once the loop is locked,
so can be ignored here. For each ÷ (NTOT) cycle:
ACC
x (fCOMP Period) x Iprop (0) .... (5)
NTOT x MOD
This formula could be used as it stands but the circuit can
be simplified if it is recalled that Iprop(0) depends on the CN
value so that loop dynamics are kept constant over a wide
range of frequencies by changing CN in proportion to the total
divisionratioNTOT.InthosesystemswhereCNisheldconstant
the synthesiser is in effect considered to be operating over a
narrow frequency band so NTOT can also be considered
constantandthefollowingcalculationsstillapply. Thevalueof
Iprop(0) is set by a DAC in ACE9030 from the reference
current Ibo so that:
NTOT + F
NTOT + F
fFRANC = fCOMP x
= fCOMP x 1+
( )
NTOT
NTOT
and so the phase error increases each cycle by:
F
x (fCOMP Period) .... (2)
Iprop (0) = CN x Ibo .... (6)
NTOT
and the value of CN tracks NTOT with a scaling factor SF such
that:
This phase error gives an unwanted correction pulse on
the ØDOWN output as the VCO frequency is too high for the
division ratio in use. The phase error increases as ÷ NTOT
cycles follow each other until eventually the accumulator
overflows and causes a ÷ (NTOT + 1) cycle.
CN = SF x NTOT
putting both of these equations into formula (5) gives the
charge to be cancelled as:
For each ÷ (NTOT + 1) cycle:
ACC x SF
NTOT + F
Charge =
x (fCOMP Period) x Ibo .... (7)
fFRANC = fCOMP x
MOD
NTOT + 1
31
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