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ACE9030MIWFP2Q 参数 Datasheet PDF下载

ACE9030MIWFP2Q图片预览
型号: ACE9030MIWFP2Q
PDF下载: 下载PDF文件 查看货源
内容描述: 无线接口和双合成器 [Radio Interface and Twin Synthesiser]
分类和应用: 无线
文件页数/大小: 39 页 / 382 K
品牌: MITEL [ MITEL NETWORKS CORPORATION ]
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ACE9030  
The value of SF can be found from any channel but to get  
a quick estimate the highest frequency can be considered as  
there is a fixed upper limit on CN of 256 so:  
For a typical AMPS cellphone the fVCO(max) for 45 MHz  
I.F. is 938·97 MHz, fCRYSTAL is 14·85 MHz, MOD is 8 and  
CN(max)canbeassumedtobechosenaround200,givingIco  
= 0·198 x Ibo.  
CN(max)  
SF =  
NTOT(max)  
Fractional-N Mode with Speed-Up  
Putting suggested typical values into equation (7);  
NTOT(max) = 10000, CN(max) = 250, and MOD = 8, and then  
assuming the current flows for the whole comparison period  
the current to be multiplied by ACC is Ibo / 320. The typical Ibo  
is only 1 µA so this is a very small current of around 3 nA and  
wouldbetoosmalltocontrolaccuratelyandcertainlytoosmall  
for production testing.  
The error signal to be cancelled is a narrow pulse at the  
comparison frequency so the best cancellation of the whole  
spectrum of the error is also a narrow pulse. It is not practical  
to generate a variable width pulse to match the error pulse but  
a fixed width variable amplitude pulse is possible and it can be  
timed to approximately coincide with the error pulse to give  
good cancellation.  
The compensation current amplitude is also increased by  
gating it with a small time window and in ACE9030 the gate is  
set to two cycles of the reference clock which straddle the  
active edge of the comparison frequency signal to the phase  
comparator. The total reference division from reference clock  
to comparison frequency is the programmable divider set by  
NR in Word D multiplied by 1, 2, 4, or 8 as selected by the SM  
bits also in Word D and this total may be called RMAIN, so for the  
compensation current the scaling is RMAIN / 2.  
When Speed-up is active the main proportional charge  
pumps are run at an increased current and the integral charge  
pumps are switched on to move the loop filter voltage faster.  
The phase errors due to Fractional-N mode will be the same  
as normal once the loop is locked so the compensation pulses  
must be increased to match the proportional and integral  
charge pump currents in order to allow a smooth change over  
to normal mode at the end of Speed-up time. The same 2L + 1  
and K coefficients as used for the proportional and integral  
chargepumpcurrentsareusedonthecompensationcurrents  
so from equation (8):  
Normal Mode:  
Proportional Compensation Current:  
Icomp(0) = ACC x Ico  
Integral Compensation Current:  
none = off  
Speed-up Mode:  
Proportional Compensation Current:  
Icomp(1) = 2L + 1 x ACC x Ico  
Integral Compensation Current:  
Icomp(2) = K x 2L + 1 x ACC x Ico  
The charge needed is still as in equation (7) but the  
current can be defined as:  
Required Accuracy of Compensation  
With the compensation scheme used in ACE9030 it is not  
possible to get perfect cancellation of the loop disturbance by  
the Fractional-N system due to the mis-match of the pulse  
shapes leaving some high frequency terms, but if the areas  
are matched there will be complete removal of the low fre-  
quency components and the loop filter can be assumed able  
to remove higher frequencies.  
Typical timing waveforms for the phase error and its  
compensation are shown in figure 28 for a loop operating in  
1/8’s mode (hence MOD = 8), with a VCO at 1 GHz, and a  
comparison frequency of 100 kHz (hence NTOT = 10,000 and  
fCOMP period = 10 µs) so that each phase error can be found  
from equation (4) as:  
Icomp (0) = ACC x Ico .....(8)  
where, in ACE9030, the compensation reference current Ico  
is set by an external resistor RSC such that:  
IRSC  
320  
Ico =  
but this Ico must be chosen to cancel the error charge in  
equation (7), and the scaling effect of 2 reference cycles in  
RMAIN has been derived above, giving:  
(ACC x 10 µs) / (10,000 x 8) = ACC x 0·125 ns.  
If the reference is a 12·8 MHz crystal, it gives a correction  
SF  
MOD  
RMAIN  
2
Ico =  
x
x Ibo  
pulse  
duration,  
two  
reference  
cycles,  
of  
2/(12·8 MHz) = 156 ns.  
If the charge pump current of 250 µA is set by a CN value  
of 250 the reference current Ibo from equation (6) is 1 µA and  
thecompensationstepcurrent Icocanbefoundfromequation  
(10) as 0·2 x Ibo = 0·2 µA.  
Areas of the error and the compensation pulses, equa-  
tions (4) and (8) must match to get good low frequency  
cancellation. AlthoughshownasaverynarrowpulseonØDOWN  
the phase error will often appear as a change in size of the  
pulses on either ØDOWN or ØUP which occur to maintain lock.  
The following calculations would then apply to the changes  
and give the same final result.  
IftherewasnocompensationtheØDOWN pulseswouldgive  
sidebands at a level set by the loop filter capacitor values and  
the VCO gain.  
In a typical system the filter proportional capacitor can be  
6·8 nF and the VCO could cover 30 MHz in 3 V, giving  
10 MHz/V. Assuming for the moment that all error pulses are  
the same at the level of a mid-range ACC value, say 4, and do  
then removing SF to help evaluate the values needed:  
CN (max)  
RMAIN  
2
Ico =  
x
x Ibo ....(9)  
MOD x NTOT(max)  
this can then be further processed by replacing RMAIN and  
NTOT(max) by the frequency ratios:  
fvco (max)  
fCOMP  
fCRYSTAL  
fCOMP  
RMAIN =  
and NTOT (max) =  
then when substituting these into equation (9) the fCOMP terms  
cancel leaving:  
CN (max)  
fCRYSTAL  
Ico =  
x
x Ibo ....(10)  
2
MOD x fVOC (max)  
32  
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