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ACE9030MIWFP2Q 参数 Datasheet PDF下载

ACE9030MIWFP2Q图片预览
型号: ACE9030MIWFP2Q
PDF下载: 下载PDF文件 查看货源
内容描述: 无线接口和双合成器 [Radio Interface and Twin Synthesiser]
分类和应用: 无线
文件页数/大小: 39 页 / 382 K
品牌: MITEL [ MITEL NETWORKS CORPORATION ]
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ACE9030  
APPLICATIONS HINTS  
PDP  
PDI  
VCO  
PDA  
VCO  
VDD & VSS Supply Pins  
All VDD pins must be well decoupled to ground. All VSS pins  
must be connected through very low impedance lines to the  
ground point.  
OR  
Serial Bus  
Edge speeds on the serial bus should not be too fast in  
order to avoid ringing which then can cause significant modu-  
lation of the synthesisers, including CLK8.  
Fig. 29 Typical Synthesiser Loop Filters  
frequency and so could be a very slow loop to lock but in many  
systems it will be powered down for as much time as possible  
to economise on battery use and will then need to power-up  
and lock quickly, leading to a more complex filter.  
The values of the components in these filters may be  
calculated with the help of appendix AB43 in the Personal  
Communications Handbook or for a more complete analysis  
the application note AN94, available from Mitel Semiconduc-  
torMarketingDepartment, maybeused. Thisnotewaswritten  
specifically for the NJ88C33 synthesiser but the mathematics  
apply equally well to the ACE9030.  
Loop Filters  
Both synthesisers use passive loop filters and typical  
circuits can be either of these two configurations; the need for  
the extra roll-off in the right hand circuit is only for the more  
critical applications.  
The loop filter needed is partly set by the application  
specification and partly by the architectural design of the  
cellphone. The main synthesiser will need to hop channels at  
a rate set by the hand-off times of the network and so is well  
defined. The auxiliary synthesiser is always on the same  
AFC Circuit  
FIRST  
I.F  
SECOND  
I.F  
RECEIVED  
SIGNAL FROM  
BASESTATION  
RX BAND  
AFCIN  
AFCOUT  
LO2  
MAIN  
SYNTH  
AFC SAMPLE  
AT 504 kHz  
ACE9030  
Fig. 30 Simplified Receiver Architecture  
In order to fine trim the crystal oscillator frequency to the  
correct value the ACE9030 includes a sampling circuit to  
convert the final intermediate frequency signal (input on  
AFCIN) to a logic signal and then to mix it down to a low  
frequency output (on AFCOUT) for counting in the  
microcontroller.Theoperationofthissystemcanbeexplained  
with the use of a simplified block diagram of the receiver  
architecture as in figure 30.  
the effect of the high-side mixing dominates to give an output  
which drops in frequency when the crystal has a positive  
frequency error. As a result of the chain of mixing stages the  
error in the first local oscillator due to the crystal frequency will  
give a similar frequency shift at the output of the third mixer  
which is then a large percentage change in the frequency of  
AFCOUT so it is possible to measure AFCOUT against the  
crystal to determine the trim needed.  
Most receivers run the first mixer with a high-side local  
oscillator controlled by the Main synthesiser, so a positive  
crystal frequency error will give an increased First I.F. This is  
then mixed down further by a low-side second oscillator, LO2  
in the ACE9030, derived by multiplying the same crystal as  
used for the Main synthesiser. A positive crystal frequency  
error would now give a reduced second I.F. if the error in the  
first I.F. is ignored, but the overall effect is an increase by an  
amount slightly smaller than the increase in the first I.F.  
The second I.F. signal AFCIN at around 450 kHz drives  
the F.M. Discriminator to recover the modulation and also  
feeds a third mixer where high-side injection is used to give a  
very low output frequency, around 54 kHz, and is output on  
AFCOUT for counting. This third mixer is driven by a clock  
derived from the crystal but at a much reduced frequency so  
To illustrate the sensitivity of the AFC loop a numerical  
example can be used, and in the calculations that follow the  
selection of parameters for the synthesisers are also included  
to show how some choices are made.  
Assume the required receiver frequency is AMPS chan-  
nel 1, that is 870·030 MHz and that the cellular terminal is built  
with a 45 MHz first I.F., a 450 kHz second I.F., and a  
14·85 MHz crystal.  
To receive 870·030 MHz with a 45 MHz first I.F. needs  
the first local oscillator, the Main synthesiser, to run at a  
frequency of 870·030 + 45·000 = 915·030 MHz when using  
high-side injection. For AMPS the most convenient compari-  
son frequency is the channel spacing of 30 kHz so the total  
division from VCO to phase comparator (NTOT as used else-  
where) will be 30501 for this channel and the reference  
34  
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