SDA 9380 - B21
Preliminary Data Sheet
Recommended operating conditions
Parameter
Symbol Min
Nom Max
Unit Remark
Slope
IIC bus: peak drive limit B1,B0
10
11
00
01
0.125
0.375
0.625
0.875
Blue stretch (control bit BLUES; subaddress 20h)
Decrease of small signal gain for red
and green at nominal input amplitu-
des and nominal settings of contrast
and brightness
17
%
%
Percentage of nominal input voltage
at which decrease of gain begins
(nominal settings of contrast and
brightness)
80
I²C Bus (all values are referred to min(V ) and max(V ))
IH
IL
SCL clock frequency
fSCL
VIH
0
400
kHz
V
High-level input voltage
0.75*
5.25
VDD(D)
Low-level input voltage
Load capacitance
VIL
Cb
tR
0
1.5
V
400
300*)
pF
ns
Rise times of SCL, SDA
20+0.1*
Cb/pF*)
Fall times of SCL, SDA
tF
20+0.1*
Cb/pF*)
300
50
ns
Set-up time DATA
tSU;DAT
tHD;DAT
Cb
100
0
ns
ns
ns
Hold time DATA
Spike duration at inputs
*) Fast-mode (fSCL = 400 kHz)
0
Micronas
8-49
2001-01-29
MICRONAS [ MICRONAS ]
