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SDA9380-B21 参数 Datasheet PDF下载

SDA9380-B21图片预览
型号: SDA9380-B21
PDF下载: 下载PDF文件 查看货源
内容描述: EDDC增强偏转器和RGB处理器 [EDDC Enhanced Deflection Controller and RGB Processor]
分类和应用: 商用集成电路
文件页数/大小: 72 页 / 404 K
品牌: MICRONAS [ MICRONAS ]
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SDA 9380 - B21  
Preliminary Data Sheet  
Recommended operating conditions  
Parameter  
Symbol Min  
Nom Max  
Unit Remark  
Saturation control (control bit B0...B5; subaddress 25h)  
Saturation control range  
52  
dB  
dB  
63 steps  
Nominal saturation  
B7...B2 = 110001  
0
Contrast control (control bit B7...B0; subaddress 24h)  
Contrast control range  
20  
dB  
255 steps  
Nominal contrast  
B7...B0 = 00000000  
0
dB  
dB  
Tracking between the three channels  
over a control range of 10 dB  
0.5  
Brightness control (control bit B7...B0; subaddress 23h)  
Brightness control range  
+- 0.75  
V
255 steps  
Black level stretch (control bit BLCKS; subaddress 20h)  
Maximum black level shift  
15  
-1  
-1  
8
21  
0
27  
1
IRE  
IRE  
IRE  
IRE  
Level shift at 100% peak white  
Level shift at 50% peak white  
Level shift at 15% peak white  
3
11  
14  
Peak drive limit (control byte peak drive limit, bits B7...B0; bit PDD)  
Peak detector  
Peak detector level (at the R, G or B  
output at nominal white drive relative  
to cut off)  
IIC bus: peak drive limit B7...B4  
minimum value (range -8)  
maximum value (range +7)  
1.5  
3.5  
V
V
Soft clipper  
Starting level (relative to peak detek-  
tors level)  
IIC bus: peak drive limit B3, B2  
10  
11  
00  
100  
105  
110  
%
%
%
01 (soft clipper off)  
infinite  
Micronas  
8-48  
2001-01-29  
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