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MAS3507D 参数 Datasheet PDF下载

MAS3507D图片预览
型号: MAS3507D
PDF下载: 下载PDF文件 查看货源
内容描述: MPEG 1/2 2/3层音频解码器 [MPEG 1/2 Layer 2/3 Audio Decoder]
分类和应用: 解码器
文件页数/大小: 60 页 / 816 K
品牌: MICRONAS [ MICRONAS ]
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MAS 3507D  
PRELIMINARY DATA SHEET  
2.7.3. Parallel Input Output Interface (PIO)  
.
Table 2–4: Switching from SDI- to PIO-DMA-Input  
The parallel interface of the MAS 3507D uses the lines  
PI0...PI4, PI8, PI12...PI19, and several control lines.  
Address 1)  
Value  
$e6, Bit 4  
1
2.7.3.1. PIO-DMA Input Mode  
1) Startup Configuration Register  
By setting the PIO pin PI4 to “1”, the PIO-DMA input  
mode of the MAS 3507D is activated after reset.  
Table 2–5: Switching from PIO-DMA- to SDI-Input  
Normally, the input mode should not be altered in a  
customer’s application. Should this nonetheless be  
desired, the necessary changes are described in  
Table 2–4 and Table 2–5.  
Step  
Address 1)  
$e6, Bit 4  
$4b  
Value  
0
1
2
2.7.3.2. Writing MPEG Data to the PIO-DMA  
$82  
1) PIO Configuration Register  
Note: These 2 steps must be done in above  
order!  
The PIO-DMA mode enables the writing of 8-bit paral-  
lel MPEG data to the MAS 3507D. In this mode, PIO  
lines PI19...PI12 are switched to the MAS 3507D data  
input which hence will be an 8-bit parallel input port  
with MSB first (at position PI19) for the MPEG bit  
stream data. In order to write data to this parallel port  
successfully, a special handshake protocol has to be  
used by the controller (see Fig. 2–5).  
Note: Either SII has to be set to “1”, or SIC clock input  
has to be stopped (“0”) in this mode.  
.
tst tr  
tpd  
trtrq  
trpr  
teodq  
teod  
high  
low  
EOD  
PR  
high  
tpr  
low  
high  
low  
RTR  
tset th  
high  
low  
PI[19:12]  
Byte 1  
Byte 15  
MAS 3507D latches the PIO DATA  
Fig. 2–5: Handshake protocol for writing MPEG data to the PIO-DMA  
12  
Micronas