PRELIMINARY DATA SHEET
MAS 3507D
2.7. Interfaces
The MPEG input signal format is shown in Fig. 2–4.
The data values are latched with the falling edge of the
SIC signal.
The MAS 3507D uses an I2C control interface,
2 selectable serial input interfaces for MPEG bit
stream (SDI, SDI*) , a parallel I/O interface (PIO) for
MPEG- or ADPCM-data and a digital audio output
interface (SDO) for the decoded audio data (I2S or
similar). Additionally, the parallel I/O interface (PIO)
may be used for monitoring and mode selection tasks.
The PIO lines are defined by the internal firmware.
The MPEG bit stream generated by an encoder is
unformatted. It will be formatted (e.g. 8 bit or 16 bit) by
storing on a media (Flash-RAM, Harddisk). The serial
data required from the MPEG bit stream interface must
be in the same bit order as produced by the encoder.
2.7.2. SDI* Selection
2.7.1. MPEG Bit Stream Interface (SDI)
An alternative serial input (SDI*) is available. The alter-
native serial input can be selected by setting register
SI1M0 at address $4f (see Table 2–3).
The MPEG bit stream input interface uses the three
pins: SIC, SII, and SID. For MPEG decoding operation,
the SII pin must always be connected to VSS.
Table 2–3: SDI* Selection via Register SI1M0,
$4f (write)
The serial interface has to be initialized before the
first use. Otherwise no output signal is produced.
After Power-up or a rising slope on Pin PORQ, write
the following I2C-command, while SIC is hold low:
Value
Function
W $3A 68 93 B0 00 02
(write $0020 into register $3B)
0
2
use SDI lines
use PI14...PI16 pins for
serial input (named SDI*)
W $3A 68 00 01
(execute “RUN 1” command)
V
V
h
SIC
SII
l
data valid
latch data at falling edge of clock
V
V
h
l
V
V
h
SID
l
Fig. 2–4: Schematic timing of the SDI (MPEG) input
Micronas
11
MICRONAS [ MICRONAS ]
