CIP 3250A
ADVANCE INFORMATION
3.6.3.12. Characteristics Analog R, G, B Inputs
Symbol
Parameter
Pin Name
Min.
Typ.
Max.
Unit
Test Conditions
V
VRT
Reference Voltage Top
ADREF
2.4
2.6
2.8
V
10 µF/10 nF, 1GΩ Probe
I C: <14>LOAD = 3
2
RGB – Path
R
C
Input Resistance
RV
GY
BU
5
MΩ
Code Clamp–DAC=0
VIN
Input Capacitance
Full Scale Input Voltage
4.5
1.0
1.5
pF
VIN
V
VIN
0.85
1.1
V
PP
Full Scale 0 ... 255
V
VINCL
Input Clamping Level,
UV for Binary Code 128
V
Binary Level = 128 LSB
V
VINCL
Input Clamping Level,
RGB, Y for Binary Code 16
1.06
V
Binary Level = 16 LSB
Gain Match
tbd
%
Full Scale @ 1 MHz
Q
Clamping DAC Resolution
Input Clamping Current per step
–32
31
steps
µA
6 Bit – I–DAC, bipolar
CL
V
VIN
=1.5 V
I
0.59
0.85
220
1.11
ꢂ0.5
CL–LSB
INL
Clamping DAC Integral
Non-Linearity
LSB
ICL
C
Clamping–Capacitor
–
–
nF
Coupling–Cap. @ Inputs
ICL
Dynamic Characteristics for RGB–Path
2
at V
= 3.3 V, 70 pF load at all outputs, I C: <14>LOAD = 0
EXT
BW
Bandwidth
RV
GY
BU
8
MHz
dB
–2 dBr input signal pegel
1 MHz, –2 dBr signal pegel
XTALK
THD
Crosstalk, any Two Video Inputs
Total Harmonic Distortion
–42
–42
–tbd
–tbd
dB
1 MHz, 5 harmonics,
–2 dBr signal pegel
SINAD
Signal to Noise and Distortion
Ratio
tbd
tbd
dB
1 MHz, all outputs,
–2 dBr signal pegel
INL
Integral Non-Linearity,
±4.0
±1.0
LSB
LSB
Code Density,
DC–ramp
DNL
Differential Non-Linearity
3.6.3.13. Characteristics Analog FBL Input
Symbol
Parameter
Pin Name
Min.
5
Typ.
–
Max.
–
Unit
Test Conditions
R
Input Resistance
FB
MΩ
FBIN
FBIN
V
Full Scale Input Voltage
Threshold for FBL–Monitor
0.85
0.5
1.0
0.65
1.1
0.8
V
PP
V
PP
Full Scale 0 ... 63
Dynamic Characteristics for FBL Input
2
at V
= 3.3 V, 70 pF load at all outputs, I C: <14>LOAD = 0
EXT
BW
Bandwidth
FB
8
MHz
dB
–2 dBr input signal pegel
THD
Total Harmonic Distortion
–38
–36
–tbd
1 MHz, 5 harmonics,
–2 dBr signal pegel
SINAD
Signal to Noise and Distortion
Ratio
tbd
dB
1 MHz, all outputs,
–2 dBr signal pegel
42
Micronas
MICRONAS [ MICRONAS ]
