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N25Q512A13GF840E 参数 Datasheet PDF下载

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型号: N25Q512A13GF840E
PDF下载: 下载PDF文件 查看货源
内容描述: 美光的串行NOR闪存3V ,多个I / O, 4KB扇区擦除N25Q512A [Micron Serial NOR Flash Memory 3V, Multiple I/O, 4KB Sector Erase N25Q512A]
分类和应用: 闪存
文件页数/大小: 91 页 / 1214 K
品牌: MICRON [ MICRON TECHNOLOGY ]
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512Mb, Multiple I/O Serial Flash Memory  
XIP Mode  
Figure 37: XIP Mode Directly After Power-On  
Mode 3  
Mode 0  
0
1
2
3
4
5
6
7
8
9
10 11 12 13 14 15 16  
C
t
VSI (<100µ)  
VCC  
NVCR check:  
XIP enabled  
S#  
A[MIN]  
LSB  
DOUT DOUT DOUT DOUT DOUT  
Xb  
DQ0  
DOUT DOUT DOUT DOUT DOUT  
MSB  
DQ[3:1]  
A[MAX]  
Dummy cycles  
1. Xb is the XIP confirmation bit and should be set as follows: 0 to keep XIP state; 1 to exit  
XIP mode and return to standard read mode.  
Note:  
Confirmation Bit Settings Required to Activate or Terminate XIP  
The XIP confirmation bit setting activates or terminates XIP after it has been enabled or  
disabled. This bit is the value on DQ0 during the first dummy clock cycle in the FAST  
READ operation. In dual I/O XIP mode, the value of DQ1 during the first dummy clock  
cycle after the addresses is always "Don't Care." In quad I/O XIP mode, the values of  
DQ3, DQ2, and DQ1 during the first dummy clock cycle after the addresses are always  
"Don't Care."  
Table 31: XIP Confirmation Bit  
Bit Value  
Description  
0
1
Activates XIP: While this bit is 0, XIP remains activated.  
Terminates XIP: When this bit is set to 1, XIP is terminated and the device returns  
to SPI.  
Table 32: Effects of Running XIP in Different Protocols  
Protocol  
Effect  
Extended I/O and Dual I/O  
In a device with a dedicated part number where RST# is enabled, a LOW pulse  
on that pin resets XIP and the device to the state it was in previous to the last  
power-up, as defined by the nonvolatile configuration register.  
Dual I/O  
Values of DQ1 during the first dummy clock cycle are "Don't Care."  
PDF: 09005aef84752721  
n25q_512mb_1ce_3V_65nm.pdf - Rev. O 05/13 EN  
Micron Technology, Inc. reserves the right to change products or specifications without notice.  
72  
© 2011 Micron Technology, Inc. All rights reserved.  
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