2Mb: 128K x 18, 64K x 32/36
FLOW-THROUGH SYNCBURST SRAM
3.3V I/O AC TEST CONDITIONS
2.5V I/O AC TEST CONDITIONS
Input pulse levels ................. VIH = (VDD/2.2) + 1.5V
Input pulse levels ............. VIH = (VDD/2.64) + 1.25V
....................VIL = (VDD/2.2) - 1.5V
................VIL = (VDD/2.64) - 1.25V
Input rise and fall times..................................... 1ns
Input timing reference levels ..................... VDD/2.2
Output reference levels ............................VDDQ/2.2
Output load ............................. See Figures 1 and 2
Input rise and fall times..................................... 1ns
Input timing reference levels ................... VDD/2.64
Output reference levels ............................... VDDQ/2
Output load ............................. See Figures 3 and 4
2.5V I/O Output Load Equivalents
3.3V I/O Output Load Equivalents
Q
Q
ZO= 50Ω
50Ω
ZO= 50
50
VT = 1.25V
VT = 1.5V
Figure 3
Figure 1
+2.5V
225Ω
5pF
+3.3V
317
5pF
Q
Q
225Ω
351
Figure 2
Figure 4
LOAD DERATING CURVES
The Micron 128K x 18, 64K x 32, and 64K x 36
SyncBurst SRAM timing is dependent upon the capaci-
tive loading on the outputs.
Consult the factory for copies of I/O current versus
voltage curves.
2Mb: 128K x 18, 64K x 32/36 Flow-Through SyncBurst SRAM
MT58L128L18F_2.p65 – Rev. 6/01
Micron Technology, Inc., reserves the right to change products or specifications without notice.
©2000,MicronTechnology,Inc.
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