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MT48LC4M16A2P-75G 参数 Datasheet PDF下载

MT48LC4M16A2P-75G图片预览
型号: MT48LC4M16A2P-75G
PDF下载: 下载PDF文件 查看货源
内容描述: SDR SDRAM MT48LC16M4A2 â ????梅格4 ×4× 4银行MT48LC8M8A2 â ???? 2梅格×8× 4银行MT48LC4M16A2 â ???? 1梅格×16× 4银行 [SDR SDRAM MT48LC16M4A2 – 4 Meg x 4 x 4 Banks MT48LC8M8A2 – 2 Meg x 8 x 4 Banks MT48LC4M16A2 – 1 Meg x 16 x 4 Banks]
分类和应用: 动态存储器
文件页数/大小: 83 页 / 3595 K
品牌: MICRON [ MICRON TECHNOLOGY ]
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64Mb: x4, x8, x16 SDRAM  
Bank/Row Activation  
Bank/Row Activation  
Before any READ or WRITE commands can be issued to a bank within the SDRAM, a  
row in that bank must be opened. This is accomplished via the ACTIVE command,  
which selects both the bank and the row to be activated.  
After a row is opened with the ACTIVE command, a READ or WRITE command can be  
issued to that row, subject to the tRCD specification. tRCD (MIN) should be divided by  
the clock period and rounded up to the next whole number to determine the earliest  
clock edge after the ACTIVE command on which a READ or WRITE command can be  
entered. For example, a tRCD specification of 20ns with a 125 MHz clock (8ns period)  
results in 2.5 clocks, rounded to 3. This is reflected in Figure 17 (page 46), which covers  
any case where 2 < tRCD (MIN)/tCK 3. (The same procedure is used to convert other  
specification limits from time units to clock cycles.)  
A subsequent ACTIVE command to a different row in the same bank can only be issued  
after the previous active row has been precharged. The minimum time interval between  
successive ACTIVE commands to the same bank is defined by tRC.  
A subsequent ACTIVE command to another bank can be issued while the first bank is  
being accessed, which results in a reduction of total row-access overhead. The mini-  
mum time interval between successive ACTIVE commands to different banks is defined  
by tRRD.  
Figure 17: Example: Meeting tRCD (MIN) When 2 < tRCD (MIN)/tCK < 3  
T0  
T1  
T2  
T3  
CLK  
t
t
t
CK  
CK  
CK  
READ or  
WRITE  
Command  
ACTIVE  
NOP  
NOP  
t
RCD(MIN)  
Don’t Care  
PDF: 09005aef80725c0b  
64mb_x4x8x16_sdram.pdf - Rev. U 05/13 EN  
Micron Technology, Inc. reserves the right to change products or specifications without notice.  
46  
© 1999 Micron Technology, Inc. All rights reserved.