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MT48LC4M16A2P-75G 参数 Datasheet PDF下载

MT48LC4M16A2P-75G图片预览
型号: MT48LC4M16A2P-75G
PDF下载: 下载PDF文件 查看货源
内容描述: SDR SDRAM MT48LC16M4A2 â ????梅格4 ×4× 4银行MT48LC8M8A2 â ???? 2梅格×8× 4银行MT48LC4M16A2 â ???? 1梅格×16× 4银行 [SDR SDRAM MT48LC16M4A2 – 4 Meg x 4 x 4 Banks MT48LC8M8A2 – 2 Meg x 8 x 4 Banks MT48LC4M16A2 – 1 Meg x 16 x 4 Banks]
分类和应用: 动态存储器
文件页数/大小: 83 页 / 3595 K
品牌: MICRON [ MICRON TECHNOLOGY ]
 浏览型号MT48LC4M16A2P-75G的Datasheet PDF文件第40页浏览型号MT48LC4M16A2P-75G的Datasheet PDF文件第41页浏览型号MT48LC4M16A2P-75G的Datasheet PDF文件第42页浏览型号MT48LC4M16A2P-75G的Datasheet PDF文件第43页浏览型号MT48LC4M16A2P-75G的Datasheet PDF文件第45页浏览型号MT48LC4M16A2P-75G的Datasheet PDF文件第46页浏览型号MT48LC4M16A2P-75G的Datasheet PDF文件第47页浏览型号MT48LC4M16A2P-75G的Datasheet PDF文件第48页  
64Mb: x4, x8, x16 SDRAM  
Mode Register  
Table 18: Burst Definition Table  
Order of Accesses Within a Burst  
Burst Length  
Starting Column Address  
Type = Sequential  
Type = Interleaved  
2
A0  
0
0-1  
1-0  
0-1  
1-0  
1
4
8
A1  
0
A0  
0
0-1-2-3  
1-2-3-0  
2-3-0-1  
3-0-1-2  
0-1-2-3  
1-0-3-2  
2-3-0-1  
3-2-1-0  
0
1
1
0
1
1
A2  
0
A1  
0
A0  
0
0-1-2-3-4-5-6-7  
1-2-3-4-5-6-7-0  
2-3-4-5-6-7-0-1  
3-4-5-6-7-0-1-2  
4-5-6-7-0-1-2-3  
5-6-7-0-1-2-3-4  
6-7-0-1-2-3-4-5  
7-0-1-2-3-4-5-6  
0-1-2-3-4-5-6-7  
1-0-3-2-5-4-7-6  
2-3-0-1-6-7-4-5  
3-2-1-0-7-6-5-4  
4-5-6-7-0-1-2-3  
5-4-7-6-1-0-3-2  
6-7-4-5-2-3-0-1  
7-6-5-4-3-2-1-0  
0
0
1
0
1
0
0
1
1
1
0
0
1
0
1
1
1
0
1
1
1
Continuous  
n = A0–An/9/8 (location 0–y)  
Cn, Cn + 1, Cn + 2, Cn + 3...Cn - 1,  
Cn...  
Not supported  
1. For full-page accesses: y = 2048 (x4); y = 1024 (x8); y = 512 (x16).  
Notes:  
2. For BL = 2, A1–A9, A11 (x4); A1–A9 (x8); or A1–A8 (x16) select the block-of-two burst; A0  
selects the starting column within the block.  
3. For BL = 4, A2–A9, A11 (x4); A2–A9 (x8); or A2–A8 (x16) select the block-of-four burst;  
A0–A1 select the starting column within the block.  
4. For BL = 8, A3–A9, A11 (x4); A3–A9 (x8); or A3–A8 (x16) select the block-of-eight burst;  
A0–A2 select the starting column within the block.  
5. For a full-page burst, the full row is selected and A0–A9, A11 (x4); A0–A9 (x8); or A0–A8  
(x16) select the starting column.  
6. Whenever a boundary of the block is reached within a given sequence above, the fol-  
lowing access wraps within the block.  
7. For BL = 1, A0–A9, A11 (x4); A0–A9 (x8); or A0–A8 (x16) select the unique column to be  
accessed, and mode register bit M3 is ignored.  
PDF: 09005aef80725c0b  
64mb_x4x8x16_sdram.pdf - Rev. U 05/13 EN  
Micron Technology, Inc. reserves the right to change products or specifications without notice.  
44  
© 1999 Micron Technology, Inc. All rights reserved.  
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