64Mb: x4, x8, x16 SDRAM
Initialization
Note:
More than two AUTO REFRESH commands can be issued in the sequence. After steps 9
and 10 are complete, repeat them until the desired number of AUTO REFRESH + tRFC
loops is achieved.
Figure 14: Initialize and Load Mode Register
T0
T1
Tn + 1
t
To + 1
CL
Tp + 1
Tp + 2
Tp + 3
( (
) )
( (
) )
( (
) )
( (
) )
( (
) )
( (
) )
t
t
CK
CK
((
))
CH
t
t
CKS CKH
((
))
((
))
( (
) )
( (
) )
( (
) )
( (
) )
CKE
t
t
CMS CMH
( (
) )
( (
) )
( (
) )
( (
) )
( (
) )
( (
) )
( (
) )
( (
) )
AUTO
REFRESH
AUTO
REFRESH
LOAD MODE
REGISTER
2
2
2
2
COMMAND
NOP
PRECHARGE
NOP
NOP
NOP
ACTIVE
( (
) )
( (
) )
( (
) )
( (
) )
( (
) )
( (
) )
( (
) )
( (
) )
DQM/DQML,
DQMU
t
t
t
5
AS AH
( (
) )
( (
) )
( (
) )
( (
) )
( (
) )
( (
) )
( (
) )
( (
) )
A[9:0],
A[12:11]
CODE
ROW
ROW
t
AS AH
CODE
( (
) )
( (
) )
( (
) )
( (
) )
ALL BANKS
( (
) )
( (
) )
( (
) )
( (
) )
A10
SINGLE BANK
( (
) )
( (
) )
( (
) )
( (
) )
( (
) )
( (
) )
( (
) )
( (
) )
ALL
BANKS
BA[1:0]
DQ
High-Z
((
))
((
))
T = 100µs
MIN
t
t
t
t
RP
RFC
RFC
MRD
Power-up:
1,3,4
Program Mode Register
AUTO REFRESH
AUTO REFRESH
V
and
Precharge
all banks
DD
CLK stable
DON’T CARE
UNDEFINED
1. The mode register may be loaded prior to the AUTO REFRESH cycles if desired.
2. If CS is HIGH at clock HIGH time, all commands applied are NOP.
3. JEDEC and PC100 specify three clocks.
Notes:
4. Outputs are guaranteed High-Z after command is issued.
5. A12 should be a LOW at tP + 1.
PDF: 09005aef80725c0b
64mb_x4x8x16_sdram.pdf - Rev. U 05/13 EN
Micron Technology, Inc. reserves the right to change products or specifications without notice.
40
© 1999 Micron Technology, Inc. All rights reserved.
MICRON [ MICRON TECHNOLOGY ]
