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MT48LC4M16A2P-75G 参数 Datasheet PDF下载

MT48LC4M16A2P-75G图片预览
型号: MT48LC4M16A2P-75G
PDF下载: 下载PDF文件 查看货源
内容描述: SDR SDRAM MT48LC16M4A2 â ????梅格4 ×4× 4银行MT48LC8M8A2 â ???? 2梅格×8× 4银行MT48LC4M16A2 â ???? 1梅格×16× 4银行 [SDR SDRAM MT48LC16M4A2 – 4 Meg x 4 x 4 Banks MT48LC8M8A2 – 2 Meg x 8 x 4 Banks MT48LC4M16A2 – 1 Meg x 16 x 4 Banks]
分类和应用: 动态存储器
文件页数/大小: 83 页 / 3595 K
品牌: MICRON [ MICRON TECHNOLOGY ]
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64Mb: x4, x8, x16 SDRAM  
Commands  
NO OPERATION (NOP)  
The NO OPERATION (NOP) command is used to perform a NOP to the selected device  
(CS# is LOW). This prevents unwanted commands from being registered during idle or  
wait states. Operations already in progress are not affected.  
LOAD MODE REGISTER (LMR)  
The mode registers are loaded via inputs A[n:0] (where An is the most significant ad-  
dress term), BA0, and BA1(see Mode Register (page 41)). The LOAD MODE REGISTER  
command can only be issued when all banks are idle and a subsequent executable com-  
mand cannot be issued until tMRD is met.  
ACTIVE  
The ACTIVE command is used to activate a row in a particular bank for a subsequent  
access. The value on the BA0, BA1 inputs selects the bank, and the address provided se-  
lects the row. This row remains active for accesses until a PRECHARGE command is is-  
sued to that bank. A PRECHARGE command must be issued before opening a different  
row in the same bank.  
Figure 10: ACTIVE Command  
CLK  
CKE HIGH  
CS#  
RAS#  
CAS#  
WE#  
Row address  
Bank address  
Address  
BA0, BA1  
Don’t Care  
PDF: 09005aef80725c0b  
64mb_x4x8x16_sdram.pdf - Rev. U 05/13 EN  
Micron Technology, Inc. reserves the right to change products or specifications without notice.  
© 1999 Micron Technology, Inc. All rights reserved.  
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