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MT48LC4M16A2P-75G 参数 Datasheet PDF下载

MT48LC4M16A2P-75G图片预览
型号: MT48LC4M16A2P-75G
PDF下载: 下载PDF文件 查看货源
内容描述: SDR SDRAM MT48LC16M4A2 â ????梅格4 ×4× 4银行MT48LC8M8A2 â ???? 2梅格×8× 4银行MT48LC4M16A2 â ???? 1梅格×16× 4银行 [SDR SDRAM MT48LC16M4A2 – 4 Meg x 4 x 4 Banks MT48LC8M8A2 – 2 Meg x 8 x 4 Banks MT48LC4M16A2 – 1 Meg x 16 x 4 Banks]
分类和应用: 动态存储器
文件页数/大小: 83 页 / 3595 K
品牌: MICRON [ MICRON TECHNOLOGY ]
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64Mb: x4, x8, x16 SDRAM  
Temperature and Thermal Impedance  
Table 6: Thermal Impedance Simulated Values  
Θ JA (°C/W)  
Airflow =  
Θ JA (°C/W)  
Airflow =  
Θ JA (°C/W)  
Airflow =  
2m/s  
Die  
Revision  
Package  
Substrate  
0m/s  
1m/s  
Θ JB (°C/W) Θ JC (°C/W)  
G
54-pin TSOP  
High Con-  
ductivity  
70.5  
80.6  
61.2  
67.7  
57.1  
105.6  
93.5  
81.9  
66.3  
57.2  
61.5  
53.5  
98.1  
88.8  
81.9  
62.7  
54.6  
46.1  
45.7  
89.5  
87.6  
69.5  
60.7  
13.7  
54-ball VFBGA  
54-pin TSOP  
Low Con-  
ductivity  
4.9  
High Con-  
ductivity  
63.96  
122.3  
101.9  
96.9  
J
Low Con-  
ductivity  
20.7  
11.5  
High Con-  
ductivity  
54-ball VFBGA  
Low Con-  
ductivity  
High Con-  
ductivity  
74.0  
1. For designs expected to last beyond the die revision listed, contact Micron Applications  
Engineering to confirm thermal impedance values.  
Notes:  
2. Thermal resistance data is sampled from multiple lots, and the values should be viewed  
as typical.  
3. These are estimates; actual results may vary.  
Figure 8: Example: Temperature Test Point Location, 54-Pin TSOP (Top View)  
22.22mm  
11.11mm  
Test point  
10.16mm  
5.08mm  
1. Package may or may not be assembled with a location notch.  
Note:  
PDF: 09005aef80725c0b  
64mb_x4x8x16_sdram.pdf - Rev. U 05/13 EN  
Micron Technology, Inc. reserves the right to change products or specifications without notice.  
17  
© 1999 Micron Technology, Inc. All rights reserved.  
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