Table 57: Electrical Characteristics and AC Operating Conditions for Speed Extensions (Continued)
Notes 1–8 apply to the entire table
DDR3-1866
DDR3-2133
Parameter
Symbol
tDQSL
tDQSH
Min
0.45
0.45
Max
0.55
0.55
Min
0.45
0.45
Max
0.55
0.55
Unit Notes
DQS, DQS# differential input low pulse width
CK
CK
DQS, DQS# differential input high pulse
width
DQS, DQS# falling setup to CK, CK# rising
DQS, DQS# falling hold from CK, CK# rising
DQS, DQS# differential WRITE preamble
DQS, DQS# differential WRITE postamble
tDSS
tDSH
tWPRE
tWPST
0.18
0.18
0.9
–
–
–
–
0.18
0.18
0.9
–
–
–
–
CK
CK
CK
CK
25
25
0.3
0.3
DQ Strobe Output Timing
DQS, DQS# rising to/from rising CK, CK#
tDQSCK
tDQSCK
–195
1
195
10
–180
1
180
10
ps
ns
23
26
DQS, DQS# rising to/from rising CK, CK#
when DLL is disabled
(DLL_DIS)
DQS, DQS# differential output high time
DQS, DQS# differential output low time
DQS, DQS# Low-Z time (RL - 1)
tQSH
tQSL
tLZDQS
tHZDQS
tRPRE
tRPST
0.40
0.40
–390
–
–
–
0.40
0.40
–360
–
–
CK
CK
ps
21
–
21
195
180
180
22, 23
22, 23
23, 24
23, 27
DQS, DQS# High-Z time (RL + BL/2)
DQS, DQS# differential READ preamble
DQS, DQS# differential READ postamble
195
ps
0.9
Note 24
Note 27
0.9
Note 24
Note 27
CK
CK
0.3
0.3
Command and Address Timing
DLL locking time
tDLLK
tIS
512
65
–
–
512
60
–
–
CK
ps
28
CTRL, CMD, ADDR
setup to CK,CK#
Base (specification)
29, 30,
44
(AC135)
V
REF @ 1 V/ns
200
150
–
–
195
135
–
–
ps
ps
20, 30
CTRL, CMD, ADDR
setup to CK,CK#
Base (specification)
tIS
(AC125)
29, 30,
44
V
REF @ 1 V/ns
CTRL, CMD, ADDR hold Base (specification)
from CK,CK#
275
100
200
535
–
–
–
–
260
95
–
–
–
–
ps
ps
ps
ps
ns
ns
ns
20, 30
29, 30
20, 30
41
tIH
(DC100)
V
REF @ 1 V/ns
195
Minimum CTRL, CMD, ADDR pulse width
ACTIVATE to internal READ or WRITE delay
PRECHARGE command period
tIPW
tRCD
tRP
470
See Speed Bin Tables (page 74) for tRCD
See Speed Bin Tables (page 74) for tRP
See Speed Bin Tables (page 74) for tRAS
31
31
ACTIVATE-to-PRECHARGE command period
tRAS
31, 32
MICRON [ MICRON TECHNOLOGY ]
