Table 57: Electrical Characteristics and AC Operating Conditions for Speed Extensions (Continued)
Notes 1–8 apply to the entire table
DDR3-1866
DDR3-2133
Parameter
Symbol
tERR2per
tERR3per
tERR4per
tERR5per
tERR6per
tERR7per
tERR8per
tERR9per
tERR10per
tERR11per
tERR12per
Min
–88
Max
88
Min
-74
Max
74
Unit Notes
Cumulative error across 2 cycles
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
17
17
17
17
17
17
17
17
17
17
17
17
3 cycles
4 cycles
5 cycles
6 cycles
7 cycles
8 cycles
9 cycles
10 cycles
11 cycles
12 cycles
–105
–117
–126
–133
–139
–145
–150
–154
–158
–161
105
117
126
133
139
145
150
154
158
161
-87
87
-97
97
-105
-111
-116
-121
-125
-128
-132
-134
105
111
116
121
125
128
132
134
n = 13, 14 . . . 49, 50 tERRnper
tERRnper MIN = (1 + 0.68ln[n]) × tJITper MIN
cycles
tERRnper MAX = (1 + 0.68ln[n]) × tJITper MAX
ps
DQ Input Timing
Data setup time to
DQS, DQS#
Base (specification)
@ 2 V/ns
tDS
(AC135)
68
–
53
–
ps
18, 19
V
REF @ 2 V/ns
135
70
–
–
120.5
55
–
–
ps
ps
19, 20
18, 19
Data hold time from
DQS, DQS#
Base (specification)
@ 2 V/ns
tDH
(DC100)
V
REF @ 2 V/ns
120
–
–
105
280
–
–
ps
ps
19, 20
41
Minimum data pulse width
tDIPW
320
DQ Output Timing
DQS, DQS# to DQ skew, per access
tDQSQ
tQH
–
85
–
–
75
–
ps
tCK
DQ output hold time from DQS, DQS#
0.38
0.38
21
(AVG)
DQ Low-Z time from CK, CK#
DQ High-Z time from CK, CK#
tLZDQ
tHZDQ
–390
–
195
195
–360
–
180
180
ps
ps
22, 23
22, 23
DQ Strobe Input Timing
–0.27 0.27
DQS, DQS# rising to CK, CK# rising
tDQSS
–0.27
0.27
CK
25
MICRON [ MICRON TECHNOLOGY ]
