1Gb: x4, x8, x16 DDR3 SDRAM
Output Characteristics and Operating Conditions
Table 48: Differential Output Driver Characteristics
All voltages are referenced to VSS
Parameter/Condition
Symbol
Min
Max
Unit
Notes
Output leakage current: DQ are disabled;
IOZ
–5
5
μA
1
0V ≤ VOUT ≤ VDDQ; ODT is disabled; ODT is HIGH
Output slew rate: Differential; For rising and falling
edges, measure between VOL,diff(AC) = –0.2 × VDDQ and
SRQdiff
5
12
V/ns
1
V
OH,diff(AC) = +0.2 × VDDQ
Output differential cross-point voltage
VOX(AC)
VOH,diff(AC)
VOL,diff(AC)
MMPUPD
VREF - 150
VREF + 150
mV
V
1, 2, 3
1, 4
1, 4
1, 5
3
Differential high-level output voltage
+0.2 × VDDQ
–0.2 × VDDQ
–10
Differential low-level output voltage
V
Delta Ron between pull-up and pull-down for DQ/DQS
Test load for AC timing and output slew rates
10
%
Output to VTT (VDDQ/2) via 25Ω resistor
1. RZQ of 240Ω 1% with RZQ/7 enabled (default 34Ω driver) and is applicable after prop-
Notes:
er ZQ calibration has been performed at a stable temperature and voltage (VDDQ = VDD
VSSQ = VSS).
;
2. VREF = VDDQ/2; slew rate @ 5 V/ns, interpolate for faster slew rate.
3. See Figure 31 (page 71) for the test load configuration.
4. See Table 50 (page 73) for the output slew rate.
5. See Table 37 (page 64) for additional information.
6. See Figure 30 (page 71) for an example of a differential output signal.
Figure 29: DQ Output Signal
MAX output
V
OH(AC)
V
OL(AC)
MIN output
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1Gb_DDR3_SDRAM.pdf - Rev. L 03/13 EN
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