1Gb: x4, x8, x16 DDR3 SDRAM
Output Characteristics and Operating Conditions
Slew Rate Definitions for Single-Ended Output Signals
The single-ended output driver is summarized in Table 40 (page 69). With the reference
load for timing measurements, the output slew rate for falling and rising edges is de-
fined and measured between VOL(AC) and VOH(AC) for single-ended signals.
Table 49: Single-Ended Output Slew Rate Definition
Single-Ended Output Slew
Rates (Linear Signals)
Measured
From
VOL(AC)
Output
Edge
To
Calculation
DQ
Rising
VOH(AC)
V
- V
OH(AC)
OL(AC)
ǻTR
se
Falling
VOH(AC)
VOL(AC)
V
- V
OH(AC)
OL(AC)
ǻTF
se
Figure 32: Nominal Slew Rate Definition for Single-Ended Output Signals
ǻTRse
VOH(AC)
VTT
VOL(AC)
ǻTFse
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1Gb_DDR3_SDRAM.pdf - Rev. L 03/13 EN
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