1Gb: x4, x8, x16 DDR3 SDRAM
Speed Bin Tables
Speed Bin Tables
Table 51: DDR3-1066 Speed Bins
DDR3-1066 Speed Bin
CL-tRCD-tRP
-187E
7-7-7
-187
8-8-8
Parameter
Symbol
tAA
tRCD
Min
Max
Min
15
Max
Unit Notes
Internal READ command to first data
13.125
13.125
–
–
–
–
ns
ns
ACTIVATE to internal READ or WRITE delay
time
15
PRECHARGE command period
tRP
tRC
13.125
50.625
–
–
15
–
–
ns
ns
ACTIVATE-to-ACTIVATE or REFRESH command
period
52.5
ACTIVATE-to-PRECHARGE command period
tRAS
37.5
3.0
9 x tREFI
3.3
37.5
3.0
9 x tREFI
3.3
ns
ns
ns
ns
ns
ns
ns
ns
ns
CK
CK
1
2
CL = 5
CWL = 5
CWL = 6
CWL = 5
CWL = 6
CWL = 5
CWL = 6
CWL = 5
CWL = 6
tCK (AVG)
tCK (AVG)
tCK (AVG)
tCK (AVG)
tCK (AVG)
tCK (AVG)
tCK (AVG)
tCK (AVG)
Reserved
Reserved
3
CL = 6
2.5
3.3
2.5
3.3
2
Reserved
Reserved
1.875 <2.5
Reserved
1.875 <2.5
Reserved
3
CL = 7
Reserved
Reserved
Reserved
3
2, 3
3
CL = 8
1.875
<2.5
2
Supported CL settings
5, 6, 7, 8
5, 6
5, 6, 8
5, 6
Supported CWL settings
Notes:
1. tREFI depends on TOPER
2. The CL and CWL settings result in tCK requirements. When making a selection of tCK,
both CL and CWL requirement settings need to be fulfilled.
.
3. Reserved settings are not allowed.
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1Gb_DDR3_SDRAM.pdf - Rev. L 03/13 EN
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