1Gb: x4, x8, x16 DDR3 SDRAM
Output Driver Impedance
Alternative 40 Ohm Driver
Table 44: 40 Ohm Driver Impedance Characteristics
MR1[5,1]
RON
Resistor
VOUT
Min
0.6
Nom
1.0
1.0
1.0
1.0
1.0
1.0
n/a
Max
1.1
1.1
1.4
1.4
1.1
1.1
10
Unit
RZQ/6
RZQ/6
RZQ/6
RZQ/6
RZQ/6
RZQ/6
%
0,0
ꢆꢄΩ
RON40(PD)
0.2 × VDDQ
0.5 × VDDQ
0.8 × VDDQ
0.2 × VDDQ
0.5 × VDDQ
0.8 × VDDQ
0.5 × VDDQ
0.9
0.9
RON40(PU)
0.9
0.9
0.6
Pull-up/pull-down mismatch (MMPUPD
)
–10%
1. Tolerance limits assume RZQ of 240Ω 1% and are applicable after proper ZQ calibra-
tion has been performed at a stable temperature and voltage (VDDQ = VDD; VSSQ = VSS).
Refer to 40 Ohm Output Driver Sensitivity (page 67) if either the temperature or the
voltage changes after calibration.
Notes:
2. Measurement definition for mismatch between pull-up and pull-down (MMPUPD). Meas-
ure both RON(PU) and RON(PD) at 0.5 × VDDQ
:
RON(PU) - RON(PD)
MMPUPD
=
× 100
RON,nom
3. For IT and AT (1Gb only) devices, the minimum values are derated by 6% when the de-
vice operates between –40°C and 0°C (TC).
40 Ohm Output Driver Sensitivity
If either the temperature or the voltage changes after I/O calibration, then the tolerance
limits listed in Table 44 can be expected to widen according to Table 45 and Table 46
(page 68).
Table 45: 40 Ohm Output Driver Sensitivity Definition
Symbol
Min
Max
Unit
RON(PD) @ 0.2 × VDDQ 0.6 - dRONdTL × |ΔT| - dRONdVL × |ΔV|
RON(PD) @ 0.5 × VDDQ 0.9 - dRONdTM × |ΔT| - dRONdVM × |ΔV|
RON(PD) @ 0.8 × VDDQ 0.9 - dRONdTH × |ΔT| - dRONdVH × |ΔV|
RON(PU) @ 0.2 × VDDQ 0.9 - dRONdTL × |ΔT| - dRONdVL × |ΔV|
RON(PU) @ 0.5 × VDDQ 0.9 - dRONdTM × |ΔT| - dRONdVM × |ΔV|
RON(PU) @ 0.8 × VDDQ 0.6 - dRONdTH × |ΔT| - dRONdVH × |ΔV|
1.1 + dRONdTL × |ΔT| + dRONdVL × |ΔV|
1.1 + dRONdTM × |ΔT| + dRONdVM × |ΔV|
1.4 + dRONdTH × |ΔT| + dRONdVH × |ΔV|
1.4 + dRONdTL × |ΔT| + dRONdVL × |ΔV|
1.1 + dRONdTM × |ΔT| + dRONdVM × |ΔV|
1.1 + dRONdTH × |ΔT| + dRONdVH × |ΔV|
RZQ/6
RZQ/6
RZQ/6
RZQ/6
RZQ/6
RZQ/6
1. ΔT = T - T(@CALIBRATION)ꢎꢋΔV = VDDQ - VDDQ(@CALIBRATION); and VDD = VDDQ
.
Note:
PDF: 09005aef826aa906
1Gb_DDR3_SDRAM.pdf - Rev. L 03/13 EN
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67
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