1Gb: x4, x8, x16 DDR3 SDRAM
ODT Characteristics
ODT Characteristics
The ODT effective resistance RTT is defined by MR1[9, 6, and 2]. ODT is applied to the
DQ, DM, DQS, DQS#, and TDQS, TDQS# balls (x8 devices only). The ODT target values
and a functional representation are listed in Table 31 and Table 32 (page 58). The indi-
vidual pull-up and pull-down resistors (RTT(PU) and RTT(PD)) are defined as follows:
• RTT(PU) = (VDDQ - VOUT)/|IOUT|, under the condition that RTT(PD) is turned off
• RTT(PD) = (VOUT)/|IOUT|, under the condition that RTT(PU) is turned off
Figure 23: ODT Levels and I-V Characteristics
Chip in termination mode
ODT
VDDQ
IPU
IOUT = IPD - IPU
To
other
RTT(PU)
circuitry
such as
RCV, . . .
DQ
IOUT
RTT(PD)
IPD
VOUT
VSSQ
Table 31: On-Die Termination DC Electrical Characteristics
Parameter/Condition
Symbol
RTT(EFF)
ΔVM
Min
Nom
Max
Unit
Notes
1, 2
RTT effective impedance
See Table 32 (page 58)
5
Deviation of VM with respect to
VDDQ/2
–5
%
1, 2, 3
1. Tolerance limits are applicable after proper ZQ calibration has been performed at a
stable temperature and voltage (VDDQ = VDD, VSSQ = VSS). Refer to ODT Sensitivity
(page 59) if either the temperature or voltage changes after calibration.
Notes:
2. Measurement definition for RTT: Apply VIH(AC) to pin under test and measure current
I[VIH(AC)], then apply VIL(AC) to pin under test and measure current I[VIL(AC)]:
VIH(AC) - VIL(AC)
RTT
=
I(VIH(AC)) - I(VIL(AC)
)
3. Measure voltage (VM) at the tested pin with no load:
2 × VM
× 100
– 1
ǻVM =
V
DDQ
4. For IT and AT devices, the minimum values are derated by 6% when the device operates
between –40°C and 0°C (TC).
PDF: 09005aef826aa906
1Gb_DDR3_SDRAM.pdf - Rev. L 03/13 EN
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57
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