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MT41J256M4 参数 Datasheet PDF下载

MT41J256M4图片预览
型号: MT41J256M4
PDF下载: 下载PDF文件 查看货源
内容描述: DDR3 SDRAM MT41J256M4 â ????梅格32 ×4× 8银行MT41J128M8 â ????梅格16 ×8× 8银行MT41J64M16 â ???? 8梅格×16× 8银行 [DDR3 SDRAM MT41J256M4 – 32 Meg x 4 x 8 banks MT41J128M8 – 16 Meg x 8 x 8 banks MT41J64M16 – 8 Meg x 16 x 8 banks]
分类和应用: 动态存储器双倍数据速率
文件页数/大小: 214 页 / 2938 K
品牌: MICRON [ MICRON TECHNOLOGY ]
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1Gb: x4, x8, x16 DDR3 SDRAM  
ODT Characteristics  
Table 32: RTT Effective Impedances (Continued)  
MR1  
[9, 6, 2]  
RTT  
Resistor  
VOUT  
0.2 × VDDQ  
0.5 × VDDQ  
0.8 × VDDQ  
0.2 × VDDQ  
0.5 × VDDQ  
0.8 × VDDQ  
VIL(AC) to VIH(AC)  
Min  
0.6  
0.9  
0.9  
0.9  
0.9  
0.6  
0.9  
Nom  
1.0  
1.0  
1.0  
1.0  
1.0  
1.0  
1.0  
Max  
1.1  
1.1  
1.4  
1.4  
1.1  
1.1  
1.6  
Unit  
RZQ/6  
RZQ/6  
RZQ/6  
RZQ/6  
RZQ/6  
RZQ/6  
RZQ/12  
1, 0, 0  
ꢃꢄΩ  
RTT20(PD40)  
RTT20(PU40)  
ꢃꢄΩ  
1. Values assume an RZQ of 240Ω ꢈrꢂꢉꢀꢁ  
Note:  
ODT Sensitivity  
If either the temperature or voltage changes after I/O calibration, then the tolerance  
limits listed in Table 31 (page 50) and Table 32 can be expected to widen according to  
Table 33 and Table 34 (page 59).  
Table 33: ODT Sensitivity Definition  
Symbol  
Min  
Max  
Unit  
RTT  
0.9 - dRTTdT × |DT| - dRTTdV × |DV|  
1.6 + dRTTdT × |DT| + dRTTdV × |DV|  
RZQ/(2, 4, 6, 8, 12)  
1. ΔT = T - T(@ calibration), ΔV = VDDQ - VDDQ(@ calibration) and VDD = VDDQ  
.
Note:  
Table 34: ODT Temperature and Voltage Sensitivity  
Change  
dRTTdT  
dRTTdV  
Min  
Max  
1.5  
Unit  
%/°C  
0
0
0.15  
%/mV  
1. ΔT = T - T(@ calibration), ΔV = VDDQ - VDDQ(@ calibration) and VDD = VDDQ  
.
Note:  
ODT Timing Definitions  
ODT loading differs from that used in AC timing measurements. The reference load for  
ODT timings is shown in Figure 24. Two parameters define when ODT turns on or off  
synchronously, two define when ODT turns on or off asynchronously, and another de-  
fines when ODT turns on or off dynamically. Table 35 outlines and provides definition  
and measurement references settings for each parameter (see Table 36 (page 6±)).  
ODT turn-on time begins when the output leaves High-Z and ODT resistance begins to  
turn on. ODT turn-off time begins when the output leaves Low-Z and ODT resistance  
begins to turn off.  
PDF: 09005aef826aa906  
1Gb_DDR3_SDRAM.pdf - Rev. L 03/13 EN  
Micron Technology, Inc. reserves the right to change products or specifications without notice.  
59  
‹ 2006 Micron Technology, Inc. All rights reserved.  
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