1Gb: x4, x8, x16 DDR3 SDRAM
Electrical Specifications – IDD Specifications and Conditions
Table 12: IDD Measurement Conditions for Power-Down Currents
IDD2P0 Precharge
Power-Down
IDD2P1 Precharge
Power-Down
IDD2Q Precharge
Quiet
Standby Current
IDD3P Active
Power-Down
Current
Name
Current (Slow Exit)1 Current (Fast Exit)1
Timing pattern
N/A
LOW
N/A
LOW
N/A
HIGH
Toggling
tCK (MIN) IDD
N/A
N/A
LOW
CKE
External clock
tCK
tRC
Toggling
tCK (MIN) IDD
N/A
Toggling
tCK (MIN) IDD
N/A
Toggling
tCK (MIN) IDD
N/A
tRAS
N/A
N/A
N/A
N/A
tRCD
N/A
N/A
N/A
N/A
tRRD
N/A
N/A
N/A
N/A
tRC
N/A
N/A
N/A
N/A
CL
N/A
N/A
N/A
N/A
AL
N/A
N/A
N/A
N/A
CS#
HIGH
LOW
HIGH
LOW
HIGH
LOW
HIGH
LOW
Command inputs
Row/column addr
Bank addresses
DM
LOW
LOW
LOW
LOW
LOW
LOW
LOW
LOW
LOW
LOW
LOW
LOW
Data I/O
Midlevel
Enabled
Enabled, off
8
Midlevel
Enabled
Enabled, off
8
Midlevel
Enabled
Enabled, off
8
Midlevel
Enabled
Enabled, off
8
Output buffer DQ, DQS
ODT2
Burst length
Active banks
Idle banks
Special notes
None
All
None
All
None
All
All
None
N/A
N/A
N/A
N/A
1. MR0[12] defines DLL on/off behavior during precharge power-down only; DLL on (fast
exit, MR0[12] = 1) and DLL off (slow exit, MR0[12] = 0).
Notes:
2. “Enabled, off” means the MR bits are enabled, but the signal is LOW.
PDF: 09005aef826aa906
1Gb_DDR3_SDRAM.pdf - Rev. L 03/13 EN
Micron Technology, Inc. reserves the right to change products or specifications without notice.
37
2006 Micron Technology, Inc. All rights reserved.
MICRON [ MICRON TECHNOLOGY ]
