1Gb: x4, x8, x16 DDR3 SDRAM
Ball Assignments and Descriptions
Figure 7: 86-Ball FBGA – x4, x8 (Top View)
1
2
3
4
5
6
7
8
9
A
B
C
D
E
NC
NC
NC
NC
VSS
VSS
VDD
VSSQ
DQ2
NC
NF, NF/TDQS# VSS
DM, DM/TDQS VSSQ
VDD
VDDQ
VSSQ
VSSQ
DQ0
DQS
F
VDDQ
DQ1
VDD
DQ3
VSS
G
H
J
VSSQ NF, DQ6 DQS#
VREFDQ VDDQ NF, DQ4
NF, DQ7 NF, DQ5 VDDQ
NC
ODT
NC
VSS
VDD
CS#
BA0
A3
RAS#
CAS#
WE#
BA2
A0
CK
CK#
VSS
NC
CKE
NC
K
L
VDD
A10/AP
NC
ZQ
M
N
P
VSS
VREFCA
VSS
VDD
VSS
VDD
VSS
VDD
A12/BC# BA1
VSS
A5
A2
A1
A11
NC
A4
A6
A8
R
T
VDD
A7
A9
VSS
RESET# A13
U
V
W
NC
NC
NC
NC
1. Ball descriptions listed in Table 4 (page 21) are listed as “x4, x8” if unique; otherwise,
x4 and x8 are the same.
Notes:
2. A comma separates the configuration; a slash defines a selectable function.
Example D7 = NF, NF/TDQS#. NF applies to the x4 configuration only. NF/TDQS# applies
to the x8 configuration only—selectable between NF or TDQS# via MRS (symbols are de-
fined in Table 4).
PDF: 09005aef826aa906
1Gb_DDR3_SDRAM.pdf - Rev. L 03/13 EN
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